IEICE TRANSACTIONS on Information
A Design Method of SFS and SCD Combinational Circuits
Summary :
Strongly Fault-Secure (SFS) circuits are known to achieve the TSC goal of producing a non-codeword as the first erroneous output due to a fault. Strongly Code-Disjoint (SCD) circuits always map non-codeword inputs to non-codeword outputs even in the presence of faults so long as the faults are undetectable. This paper presents a new generalized design method for the SFS and SCD realization of combinational circuits. The proposed design is simple, and always gives an SFS and SCD combinational circuit which implements any given logic function. The resulting SFS/SCD circuits can be connected in cascade with each other to construct a larger SFS/SCD circuit if each interface is fully exercised.
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- IEICE TRANSACTIONS on Information Vol.E75-D No.6 pp.819-823
- Publication Date
- 1992/11/25
- Publicized
- Online ISSN
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- Type of Manuscript
- Special Section PAPER (Special Issue on Pacific Rim International Symposium on Fault Tolerant Systems)
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Shin'ichi HATAKENAKA, Takashi NANYA, "A Design Method of SFS and SCD Combinational Circuits" in IEICE TRANSACTIONS on Information,
vol. E75-D, no. 6, pp. 819-823, November 1992, doi: .
Abstract: Strongly Fault-Secure (SFS) circuits are known to achieve the TSC goal of producing a non-codeword as the first erroneous output due to a fault. Strongly Code-Disjoint (SCD) circuits always map non-codeword inputs to non-codeword outputs even in the presence of faults so long as the faults are undetectable. This paper presents a new generalized design method for the SFS and SCD realization of combinational circuits. The proposed design is simple, and always gives an SFS and SCD combinational circuit which implements any given logic function. The resulting SFS/SCD circuits can be connected in cascade with each other to construct a larger SFS/SCD circuit if each interface is fully exercised.
URL: https://global.ieice.org/en_transactions/information/10.1587/e75-d_6_819/_p
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@ARTICLE{e75-d_6_819,
author={Shin'ichi HATAKENAKA, Takashi NANYA, },
journal={IEICE TRANSACTIONS on Information},
title={A Design Method of SFS and SCD Combinational Circuits},
year={1992},
volume={E75-D},
number={6},
pages={819-823},
abstract={Strongly Fault-Secure (SFS) circuits are known to achieve the TSC goal of producing a non-codeword as the first erroneous output due to a fault. Strongly Code-Disjoint (SCD) circuits always map non-codeword inputs to non-codeword outputs even in the presence of faults so long as the faults are undetectable. This paper presents a new generalized design method for the SFS and SCD realization of combinational circuits. The proposed design is simple, and always gives an SFS and SCD combinational circuit which implements any given logic function. The resulting SFS/SCD circuits can be connected in cascade with each other to construct a larger SFS/SCD circuit if each interface is fully exercised.},
keywords={},
doi={},
ISSN={},
month={November},}
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TY - JOUR
TI - A Design Method of SFS and SCD Combinational Circuits
T2 - IEICE TRANSACTIONS on Information
SP - 819
EP - 823
AU - Shin'ichi HATAKENAKA
AU - Takashi NANYA
PY - 1992
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E75-D
IS - 6
JA - IEICE TRANSACTIONS on Information
Y1 - November 1992
AB - Strongly Fault-Secure (SFS) circuits are known to achieve the TSC goal of producing a non-codeword as the first erroneous output due to a fault. Strongly Code-Disjoint (SCD) circuits always map non-codeword inputs to non-codeword outputs even in the presence of faults so long as the faults are undetectable. This paper presents a new generalized design method for the SFS and SCD realization of combinational circuits. The proposed design is simple, and always gives an SFS and SCD combinational circuit which implements any given logic function. The resulting SFS/SCD circuits can be connected in cascade with each other to construct a larger SFS/SCD circuit if each interface is fully exercised.
ER -
English
