IEICE TRANSACTIONS on Information
Enhanced Unique Sensitization for Efficient Test Generation
Summary :
Test pattern generation is getting much harder as the circuit size becomes larger. One problem is that it tends to take much time and another one is that it is difficult to detect redundant faults. Aiming to cope with these problem, an enhanced unique sensitization technique is proposed in this paper. This powerful global implication reduces the number of backtracks with reasonable computational time. And a fast test pattern generator featuring this unique sensitization demonstrates its performance using large benchmark circuits with over ten thousands of gates. It takes only a minute to detect all testable faults and to identify all redundant faults of 20,000 gates circuit on a workstation.
- Publication
- IEICE TRANSACTIONS on Information Vol.E76-D No.9 pp.1114-1120
- Publication Date
- 1993/09/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design)
- Category
- Test
Authors
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Yusuke MATSUNAGA, Masahiro FUJITA, "Enhanced Unique Sensitization for Efficient Test Generation" in IEICE TRANSACTIONS on Information,
vol. E76-D, no. 9, pp. 1114-1120, September 1993, doi: .
Abstract: Test pattern generation is getting much harder as the circuit size becomes larger. One problem is that it tends to take much time and another one is that it is difficult to detect redundant faults. Aiming to cope with these problem, an enhanced unique sensitization technique is proposed in this paper. This powerful global implication reduces the number of backtracks with reasonable computational time. And a fast test pattern generator featuring this unique sensitization demonstrates its performance using large benchmark circuits with over ten thousands of gates. It takes only a minute to detect all testable faults and to identify all redundant faults of 20,000 gates circuit on a workstation.
URL: https://global.ieice.org/en_transactions/information/10.1587/e76-d_9_1114/_p
Copy
@ARTICLE{e76-d_9_1114,
author={Yusuke MATSUNAGA, Masahiro FUJITA, },
journal={IEICE TRANSACTIONS on Information},
title={Enhanced Unique Sensitization for Efficient Test Generation},
year={1993},
volume={E76-D},
number={9},
pages={1114-1120},
abstract={Test pattern generation is getting much harder as the circuit size becomes larger. One problem is that it tends to take much time and another one is that it is difficult to detect redundant faults. Aiming to cope with these problem, an enhanced unique sensitization technique is proposed in this paper. This powerful global implication reduces the number of backtracks with reasonable computational time. And a fast test pattern generator featuring this unique sensitization demonstrates its performance using large benchmark circuits with over ten thousands of gates. It takes only a minute to detect all testable faults and to identify all redundant faults of 20,000 gates circuit on a workstation.},
keywords={},
doi={},
ISSN={},
month={September},}
Copy
TY - JOUR
TI - Enhanced Unique Sensitization for Efficient Test Generation
T2 - IEICE TRANSACTIONS on Information
SP - 1114
EP - 1120
AU - Yusuke MATSUNAGA
AU - Masahiro FUJITA
PY - 1993
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E76-D
IS - 9
JA - IEICE TRANSACTIONS on Information
Y1 - September 1993
AB - Test pattern generation is getting much harder as the circuit size becomes larger. One problem is that it tends to take much time and another one is that it is difficult to detect redundant faults. Aiming to cope with these problem, an enhanced unique sensitization technique is proposed in this paper. This powerful global implication reduces the number of backtracks with reasonable computational time. And a fast test pattern generator featuring this unique sensitization demonstrates its performance using large benchmark circuits with over ten thousands of gates. It takes only a minute to detect all testable faults and to identify all redundant faults of 20,000 gates circuit on a workstation.
ER -
English
