On Ternary Cellular Arrays Designed from Ternary Decision Diagrams
Summary :
In this paper, we propose a method to design ternary cellular arrays by using Ternary Decision Diagrams (TDD's). Our cellular array has a rectangular structure composed of ternary switch cells. The ternary functions represented by TDD's are realized by mapping the TDD's to the arrays directly. That is, both the nodes and the edges in the TDD are realized by some sets of the cells. Since TDD's can represent easily multiple-output functions without large memory requirements, our arrays are wuitable for the realization of multiple-output functions. To evaluate our method, we apply our method to some benchmark circuits, and compare our arrays with the ternary PLA's. The experimental results show that our arrays have the advantage for their sizes, especially in the realization of symmetric functions. The results also clarify that the size of our arrays depends on the size of TDD's.
- Publication
- IEICE TRANSACTIONS on Information Vol.E78-D No.4 pp.326-335
- Publication Date
- 1995/04/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Computer Hardware and Design
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Naotake KAMIURA, Hidetoshi SATOH, Yutaka HATA, Kazuhara YAMATO, "On Ternary Cellular Arrays Designed from Ternary Decision Diagrams" in IEICE TRANSACTIONS on Information,
vol. E78-D, no. 4, pp. 326-335, April 1995, doi: .
Abstract: In this paper, we propose a method to design ternary cellular arrays by using Ternary Decision Diagrams (TDD's). Our cellular array has a rectangular structure composed of ternary switch cells. The ternary functions represented by TDD's are realized by mapping the TDD's to the arrays directly. That is, both the nodes and the edges in the TDD are realized by some sets of the cells. Since TDD's can represent easily multiple-output functions without large memory requirements, our arrays are wuitable for the realization of multiple-output functions. To evaluate our method, we apply our method to some benchmark circuits, and compare our arrays with the ternary PLA's. The experimental results show that our arrays have the advantage for their sizes, especially in the realization of symmetric functions. The results also clarify that the size of our arrays depends on the size of TDD's.
URL: https://global.ieice.org/en_transactions/information/10.1587/e78-d_4_326/_p
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@ARTICLE{e78-d_4_326,
author={Naotake KAMIURA, Hidetoshi SATOH, Yutaka HATA, Kazuhara YAMATO, },
journal={IEICE TRANSACTIONS on Information},
title={On Ternary Cellular Arrays Designed from Ternary Decision Diagrams},
year={1995},
volume={E78-D},
number={4},
pages={326-335},
abstract={In this paper, we propose a method to design ternary cellular arrays by using Ternary Decision Diagrams (TDD's). Our cellular array has a rectangular structure composed of ternary switch cells. The ternary functions represented by TDD's are realized by mapping the TDD's to the arrays directly. That is, both the nodes and the edges in the TDD are realized by some sets of the cells. Since TDD's can represent easily multiple-output functions without large memory requirements, our arrays are wuitable for the realization of multiple-output functions. To evaluate our method, we apply our method to some benchmark circuits, and compare our arrays with the ternary PLA's. The experimental results show that our arrays have the advantage for their sizes, especially in the realization of symmetric functions. The results also clarify that the size of our arrays depends on the size of TDD's.},
keywords={},
doi={},
ISSN={},
month={April},}
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TY - JOUR
TI - On Ternary Cellular Arrays Designed from Ternary Decision Diagrams
T2 - IEICE TRANSACTIONS on Information
SP - 326
EP - 335
AU - Naotake KAMIURA
AU - Hidetoshi SATOH
AU - Yutaka HATA
AU - Kazuhara YAMATO
PY - 1995
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E78-D
IS - 4
JA - IEICE TRANSACTIONS on Information
Y1 - April 1995
AB - In this paper, we propose a method to design ternary cellular arrays by using Ternary Decision Diagrams (TDD's). Our cellular array has a rectangular structure composed of ternary switch cells. The ternary functions represented by TDD's are realized by mapping the TDD's to the arrays directly. That is, both the nodes and the edges in the TDD are realized by some sets of the cells. Since TDD's can represent easily multiple-output functions without large memory requirements, our arrays are wuitable for the realization of multiple-output functions. To evaluate our method, we apply our method to some benchmark circuits, and compare our arrays with the ternary PLA's. The experimental results show that our arrays have the advantage for their sizes, especially in the realization of symmetric functions. The results also clarify that the size of our arrays depends on the size of TDD's.
ER -
English
