IEICE TRANSACTIONS on Information
Algorithms for Matrix Multiplication and the FFT on a Processor Array with Separable Buses
Summary :
This letter presents parallel algorithms for matrix multiplication and the fast Fourier transform (FFT) that are significant problems arising in engineering and scientific applications. The proposed algorithms are designed on a 3-dimensional processor array with separable buses (PASb). We show that a PASb consisting of
- Publication
- IEICE TRANSACTIONS on Information Vol.E86-D No.1 pp.136-140
- Publication Date
- 2003/01/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- LETTER
- Category
- Algorithms
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Takashi MAEBA, Mitsuyoshi SUGAYA, Shoji TATSUMI, Ken'ichi ABE, "Algorithms for Matrix Multiplication and the FFT on a Processor Array with Separable Buses" in IEICE TRANSACTIONS on Information,
vol. E86-D, no. 1, pp. 136-140, January 2003, doi: .
Abstract: This letter presents parallel algorithms for matrix multiplication and the fast Fourier transform (FFT) that are significant problems arising in engineering and scientific applications. The proposed algorithms are designed on a 3-dimensional processor array with separable buses (PASb). We show that a PASb consisting of
URL: https://global.ieice.org/en_transactions/information/10.1587/e86-d_1_136/_p
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@ARTICLE{e86-d_1_136,
author={Takashi MAEBA, Mitsuyoshi SUGAYA, Shoji TATSUMI, Ken'ichi ABE, },
journal={IEICE TRANSACTIONS on Information},
title={Algorithms for Matrix Multiplication and the FFT on a Processor Array with Separable Buses},
year={2003},
volume={E86-D},
number={1},
pages={136-140},
abstract={This letter presents parallel algorithms for matrix multiplication and the fast Fourier transform (FFT) that are significant problems arising in engineering and scientific applications. The proposed algorithms are designed on a 3-dimensional processor array with separable buses (PASb). We show that a PASb consisting of
keywords={},
doi={},
ISSN={},
month={January},}
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TY - JOUR
TI - Algorithms for Matrix Multiplication and the FFT on a Processor Array with Separable Buses
T2 - IEICE TRANSACTIONS on Information
SP - 136
EP - 140
AU - Takashi MAEBA
AU - Mitsuyoshi SUGAYA
AU - Shoji TATSUMI
AU - Ken'ichi ABE
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E86-D
IS - 1
JA - IEICE TRANSACTIONS on Information
Y1 - January 2003
AB - This letter presents parallel algorithms for matrix multiplication and the fast Fourier transform (FFT) that are significant problems arising in engineering and scientific applications. The proposed algorithms are designed on a 3-dimensional processor array with separable buses (PASb). We show that a PASb consisting of
ER -
English
