This paper seeks to improve power-performance efficiency of embedded systems by the use of dynamic reconfiguration. Programmable logic devices (PLDs) have the competence to optimize the power consumption by the use of partial and/or dynamic reconfiguration. It is a non-exclusive approach, which can use other power-reduction techniques simultaneous, and thus it is applicable to a myriad of systems. The power-performance improvement by dynamic reconfiguration was evaluated through an augmented reality system that translates Japanese into English. It is a wearable and mobile system with a head-mounted display (HMD). In the system, the computing core detects a Japanese word from an input video frame and the translated term will be output to the HMD. It includes various image processing approaches such as pattern recognition and object tracking, and these functions run sequentially. The system does not need to prepare all functions simultaneously, which provides a function by reconfiguration only when it is needed. In other words, by dynamic reconfiguration, the spatiotemporal module-based pipeline can introduce the reduction of its circuit amount and power consumption compared to the naive approach. The approach achieved marked improvements; the computational speed was the same but the power consumption was reduced to around $rac{1}{6}$.
Kei KINOSHITA
University of Tsukuba
Yoshiki YAMAGUCHI
University of Tsukuba
Daisuke TAKANO
University of Tsukuba
Tomoyuki OKAMURA
University of Tsukuba
Tetsuhiko YAO
University of Tsukuba
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Kei KINOSHITA, Yoshiki YAMAGUCHI, Daisuke TAKANO, Tomoyuki OKAMURA, Tetsuhiko YAO, "Energy Efficiency Improvement by Dynamic Reconfiguration for Embedded Systems" in IEICE TRANSACTIONS on Information,
vol. E98-D, no. 2, pp. 220-229, February 2015, doi: 10.1587/transinf.2014RCP0015.
Abstract: This paper seeks to improve power-performance efficiency of embedded systems by the use of dynamic reconfiguration. Programmable logic devices (PLDs) have the competence to optimize the power consumption by the use of partial and/or dynamic reconfiguration. It is a non-exclusive approach, which can use other power-reduction techniques simultaneous, and thus it is applicable to a myriad of systems. The power-performance improvement by dynamic reconfiguration was evaluated through an augmented reality system that translates Japanese into English. It is a wearable and mobile system with a head-mounted display (HMD). In the system, the computing core detects a Japanese word from an input video frame and the translated term will be output to the HMD. It includes various image processing approaches such as pattern recognition and object tracking, and these functions run sequentially. The system does not need to prepare all functions simultaneously, which provides a function by reconfiguration only when it is needed. In other words, by dynamic reconfiguration, the spatiotemporal module-based pipeline can introduce the reduction of its circuit amount and power consumption compared to the naive approach. The approach achieved marked improvements; the computational speed was the same but the power consumption was reduced to around $rac{1}{6}$.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.2014RCP0015/_p
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@ARTICLE{e98-d_2_220,
author={Kei KINOSHITA, Yoshiki YAMAGUCHI, Daisuke TAKANO, Tomoyuki OKAMURA, Tetsuhiko YAO, },
journal={IEICE TRANSACTIONS on Information},
title={Energy Efficiency Improvement by Dynamic Reconfiguration for Embedded Systems},
year={2015},
volume={E98-D},
number={2},
pages={220-229},
abstract={This paper seeks to improve power-performance efficiency of embedded systems by the use of dynamic reconfiguration. Programmable logic devices (PLDs) have the competence to optimize the power consumption by the use of partial and/or dynamic reconfiguration. It is a non-exclusive approach, which can use other power-reduction techniques simultaneous, and thus it is applicable to a myriad of systems. The power-performance improvement by dynamic reconfiguration was evaluated through an augmented reality system that translates Japanese into English. It is a wearable and mobile system with a head-mounted display (HMD). In the system, the computing core detects a Japanese word from an input video frame and the translated term will be output to the HMD. It includes various image processing approaches such as pattern recognition and object tracking, and these functions run sequentially. The system does not need to prepare all functions simultaneously, which provides a function by reconfiguration only when it is needed. In other words, by dynamic reconfiguration, the spatiotemporal module-based pipeline can introduce the reduction of its circuit amount and power consumption compared to the naive approach. The approach achieved marked improvements; the computational speed was the same but the power consumption was reduced to around $rac{1}{6}$.},
keywords={},
doi={10.1587/transinf.2014RCP0015},
ISSN={1745-1361},
month={February},}
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TY - JOUR
TI - Energy Efficiency Improvement by Dynamic Reconfiguration for Embedded Systems
T2 - IEICE TRANSACTIONS on Information
SP - 220
EP - 229
AU - Kei KINOSHITA
AU - Yoshiki YAMAGUCHI
AU - Daisuke TAKANO
AU - Tomoyuki OKAMURA
AU - Tetsuhiko YAO
PY - 2015
DO - 10.1587/transinf.2014RCP0015
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E98-D
IS - 2
JA - IEICE TRANSACTIONS on Information
Y1 - February 2015
AB - This paper seeks to improve power-performance efficiency of embedded systems by the use of dynamic reconfiguration. Programmable logic devices (PLDs) have the competence to optimize the power consumption by the use of partial and/or dynamic reconfiguration. It is a non-exclusive approach, which can use other power-reduction techniques simultaneous, and thus it is applicable to a myriad of systems. The power-performance improvement by dynamic reconfiguration was evaluated through an augmented reality system that translates Japanese into English. It is a wearable and mobile system with a head-mounted display (HMD). In the system, the computing core detects a Japanese word from an input video frame and the translated term will be output to the HMD. It includes various image processing approaches such as pattern recognition and object tracking, and these functions run sequentially. The system does not need to prepare all functions simultaneously, which provides a function by reconfiguration only when it is needed. In other words, by dynamic reconfiguration, the spatiotemporal module-based pipeline can introduce the reduction of its circuit amount and power consumption compared to the naive approach. The approach achieved marked improvements; the computational speed was the same but the power consumption was reduced to around $rac{1}{6}$.
ER -