An Effective Programmable Memory BIST for Embedded Memory
Summary :
This paper proposes a micro-code based Programmable Memory BIST (PMBIST) architecture that can support various kinds of test algorithms. The proposed Non-linear PMBIST (NPMBIST) guarantees high flexibility and high fault coverage using not only March algorithms but also non-linear algorithms such as Walking and Galloping. This NPMBIST has an optimized hardware overhead, since algorithms can be implemented with the minimum bits by the optimized instructions. Finally, various and complex algorithms can be run thanks to its support of multi-loop.
- Publication
- IEICE TRANSACTIONS on Information Vol.E92-D No.12 pp.2508-2511
- Publication Date
- 2009/12/01
- Publicized
- Online ISSN
- 1745-1361
- DOI
- 10.1587/transinf.E92.D.2508
- Type of Manuscript
- LETTER
- Category
- Computer Components
Authors
Keyword
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Youngkyu PARK, Jaeseok PARK, Taewoo HAN, Sungho KANG, "An Effective Programmable Memory BIST for Embedded Memory" in IEICE TRANSACTIONS on Information,
vol. E92-D, no. 12, pp. 2508-2511, December 2009, doi: 10.1587/transinf.E92.D.2508.
Abstract: This paper proposes a micro-code based Programmable Memory BIST (PMBIST) architecture that can support various kinds of test algorithms. The proposed Non-linear PMBIST (NPMBIST) guarantees high flexibility and high fault coverage using not only March algorithms but also non-linear algorithms such as Walking and Galloping. This NPMBIST has an optimized hardware overhead, since algorithms can be implemented with the minimum bits by the optimized instructions. Finally, various and complex algorithms can be run thanks to its support of multi-loop.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.E92.D.2508/_p
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@ARTICLE{e92-d_12_2508,
author={Youngkyu PARK, Jaeseok PARK, Taewoo HAN, Sungho KANG, },
journal={IEICE TRANSACTIONS on Information},
title={An Effective Programmable Memory BIST for Embedded Memory},
year={2009},
volume={E92-D},
number={12},
pages={2508-2511},
abstract={This paper proposes a micro-code based Programmable Memory BIST (PMBIST) architecture that can support various kinds of test algorithms. The proposed Non-linear PMBIST (NPMBIST) guarantees high flexibility and high fault coverage using not only March algorithms but also non-linear algorithms such as Walking and Galloping. This NPMBIST has an optimized hardware overhead, since algorithms can be implemented with the minimum bits by the optimized instructions. Finally, various and complex algorithms can be run thanks to its support of multi-loop.},
keywords={},
doi={10.1587/transinf.E92.D.2508},
ISSN={1745-1361},
month={December},}
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TY - JOUR
TI - An Effective Programmable Memory BIST for Embedded Memory
T2 - IEICE TRANSACTIONS on Information
SP - 2508
EP - 2511
AU - Youngkyu PARK
AU - Jaeseok PARK
AU - Taewoo HAN
AU - Sungho KANG
PY - 2009
DO - 10.1587/transinf.E92.D.2508
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E92-D
IS - 12
JA - IEICE TRANSACTIONS on Information
Y1 - December 2009
AB - This paper proposes a micro-code based Programmable Memory BIST (PMBIST) architecture that can support various kinds of test algorithms. The proposed Non-linear PMBIST (NPMBIST) guarantees high flexibility and high fault coverage using not only March algorithms but also non-linear algorithms such as Walking and Galloping. This NPMBIST has an optimized hardware overhead, since algorithms can be implemented with the minimum bits by the optimized instructions. Finally, various and complex algorithms can be run thanks to its support of multi-loop.
ER -
English
