A Low-Cost Standard Mode MPI Hardware Unit for Embedded MPSoC

Won-young CHUNG; Ha-young JEONG; Won Woo RO; Yong-surk LEE

doi:10.1587/transinf.E94.D.1497

A Low-Cost Standard Mode MPI Hardware Unit for Embedded MPSoC

Won-young CHUNG, Ha-young JEONG, Won Woo RO, Yong-surk LEE

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In this paper, we propose a novel low-cost Message Passing Interface (MPI) unit between processor nodes, which supports message passing in multiprocessor systems using distributed memory architecture. Our MPI unit operates in the standard mode – using the buffered mode for small amounts of data transaction and the synchronous mode for large amounts of data transaction. This results in increased performance by reducing the control message transmission time for the small amount of data. We verified the performance with a simulator designed based on SystemC. Additionally, we designed the MPI unit using VerilogHDL, and we synthesized it with a synopsys design compiler. The proposed standard mode MPI unit shows a high performance even though the size of the MPI unit occupies less than 1% of the whole chip. Thus, with respect to low-cost design and scalability, this MPI hardware unit is useful to increase overall performance of the embedded Multiprocessor System on a Chip (MPSoC).

Publication: IEICE TRANSACTIONS on Information Vol.E94-D No.7 pp.1497-1501

Publication Date: 2011/07/01

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Online ISSN: 1745-1361

DOI: 10.1587/transinf.E94.D.1497

Type of Manuscript: LETTER

Category: Computer System

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Won-young CHUNG, Ha-young JEONG, Won Woo RO, Yong-surk LEE, "A Low-Cost Standard Mode MPI Hardware Unit for Embedded MPSoC" in IEICE TRANSACTIONS on Information, vol. E94-D, no. 7, pp. 1497-1501, July 2011, doi: 10.1587/transinf.E94.D.1497.
Abstract: In this paper, we propose a novel low-cost Message Passing Interface (MPI) unit between processor nodes, which supports message passing in multiprocessor systems using distributed memory architecture. Our MPI unit operates in the standard mode – using the buffered mode for small amounts of data transaction and the synchronous mode for large amounts of data transaction. This results in increased performance by reducing the control message transmission time for the small amount of data. We verified the performance with a simulator designed based on SystemC. Additionally, we designed the MPI unit using VerilogHDL, and we synthesized it with a synopsys design compiler. The proposed standard mode MPI unit shows a high performance even though the size of the MPI unit occupies less than 1% of the whole chip. Thus, with respect to low-cost design and scalability, this MPI hardware unit is useful to increase overall performance of the embedded Multiprocessor System on a Chip (MPSoC).
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.E94.D.1497/_p

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@ARTICLE{e94-d_7_1497,
author={Won-young CHUNG, Ha-young JEONG, Won Woo RO, Yong-surk LEE, },
journal={IEICE TRANSACTIONS on Information},
title={A Low-Cost Standard Mode MPI Hardware Unit for Embedded MPSoC},
year={2011},
volume={E94-D},
number={7},
pages={1497-1501},
abstract={In this paper, we propose a novel low-cost Message Passing Interface (MPI) unit between processor nodes, which supports message passing in multiprocessor systems using distributed memory architecture. Our MPI unit operates in the standard mode – using the buffered mode for small amounts of data transaction and the synchronous mode for large amounts of data transaction. This results in increased performance by reducing the control message transmission time for the small amount of data. We verified the performance with a simulator designed based on SystemC. Additionally, we designed the MPI unit using VerilogHDL, and we synthesized it with a synopsys design compiler. The proposed standard mode MPI unit shows a high performance even though the size of the MPI unit occupies less than 1% of the whole chip. Thus, with respect to low-cost design and scalability, this MPI hardware unit is useful to increase overall performance of the embedded Multiprocessor System on a Chip (MPSoC).},
keywords={},
doi={10.1587/transinf.E94.D.1497},
ISSN={1745-1361},
month={July},}

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TY - JOUR
TI - A Low-Cost Standard Mode MPI Hardware Unit for Embedded MPSoC
T2 - IEICE TRANSACTIONS on Information
SP - 1497
EP - 1501
AU - Won-young CHUNG
AU - Ha-young JEONG
AU - Won Woo RO
AU - Yong-surk LEE
PY - 2011
DO - 10.1587/transinf.E94.D.1497
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E94-D
IS - 7
JA - IEICE TRANSACTIONS on Information
Y1 - July 2011
AB - In this paper, we propose a novel low-cost Message Passing Interface (MPI) unit between processor nodes, which supports message passing in multiprocessor systems using distributed memory architecture. Our MPI unit operates in the standard mode – using the buffered mode for small amounts of data transaction and the synchronous mode for large amounts of data transaction. This results in increased performance by reducing the control message transmission time for the small amount of data. We verified the performance with a simulator designed based on SystemC. Additionally, we designed the MPI unit using VerilogHDL, and we synthesized it with a synopsys design compiler. The proposed standard mode MPI unit shows a high performance even though the size of the MPI unit occupies less than 1% of the whole chip. Thus, with respect to low-cost design and scalability, this MPI hardware unit is useful to increase overall performance of the embedded Multiprocessor System on a Chip (MPSoC).
ER -