A Low-Cost and Energy-Efficient Multiprocessor System-on-Chip for UWB MAC Layer

Hao XIAO; Tsuyoshi ISSHIKI; Arif Ullah KHAN; Dongju LI; Hiroaki KUNIEDA; Yuko NAKASE; Sadahiro KIMURA

doi:10.1587/transinf.E95.D.2027

A Low-Cost and Energy-Efficient Multiprocessor System-on-Chip for UWB MAC Layer

Hao XIAO, Tsuyoshi ISSHIKI, Arif Ullah KHAN, Dongju LI, Hiroaki KUNIEDA, Yuko NAKASE, Sadahiro KIMURA

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Ultra-wideband (UWB) technology has attracted much attention recently due to its high data rate and low emission power. Its media access control (MAC) protocol, WiMedia MAC, promises a lot of facilities for high-speed and high-quality wireless communication. However, these benefits in turn involve a large amount of computational load, which challenges the traditional uniprocessor architecture based implementation method to provide the required performance. However, the constrained cost and power budget, on the other hand, makes using commercial multiprocessor solutions unrealistic. In this paper, a low-cost and energy-efficient multiprocessor system-on-chip (MPSoC), which tackles at once the aspects of system design, software migration and hardware architecture, is presented for the implementation of UWB MAC layer. Experimental results show that the proposed MPSoC, based on four simple RISC processors and shared-memory infrastructure, achieves up to 45% performance improvement and 65% power saving, but takes 15% less area than the uniprocessor implementation.

Publication: IEICE TRANSACTIONS on Information Vol.E95-D No.8 pp.2027-2038

Publication Date: 2012/08/01

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Online ISSN: 1745-1361

DOI: 10.1587/transinf.E95.D.2027

Type of Manuscript: PAPER

Category: Computer System

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Hao XIAO, Tsuyoshi ISSHIKI, Arif Ullah KHAN, Dongju LI, Hiroaki KUNIEDA, Yuko NAKASE, Sadahiro KIMURA, "A Low-Cost and Energy-Efficient Multiprocessor System-on-Chip for UWB MAC Layer" in IEICE TRANSACTIONS on Information, vol. E95-D, no. 8, pp. 2027-2038, August 2012, doi: 10.1587/transinf.E95.D.2027.
Abstract: Ultra-wideband (UWB) technology has attracted much attention recently due to its high data rate and low emission power. Its media access control (MAC) protocol, WiMedia MAC, promises a lot of facilities for high-speed and high-quality wireless communication. However, these benefits in turn involve a large amount of computational load, which challenges the traditional uniprocessor architecture based implementation method to provide the required performance. However, the constrained cost and power budget, on the other hand, makes using commercial multiprocessor solutions unrealistic. In this paper, a low-cost and energy-efficient multiprocessor system-on-chip (MPSoC), which tackles at once the aspects of system design, software migration and hardware architecture, is presented for the implementation of UWB MAC layer. Experimental results show that the proposed MPSoC, based on four simple RISC processors and shared-memory infrastructure, achieves up to 45% performance improvement and 65% power saving, but takes 15% less area than the uniprocessor implementation.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.E95.D.2027/_p

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@ARTICLE{e95-d_8_2027,
author={Hao XIAO, Tsuyoshi ISSHIKI, Arif Ullah KHAN, Dongju LI, Hiroaki KUNIEDA, Yuko NAKASE, Sadahiro KIMURA, },
journal={IEICE TRANSACTIONS on Information},
title={A Low-Cost and Energy-Efficient Multiprocessor System-on-Chip for UWB MAC Layer},
year={2012},
volume={E95-D},
number={8},
pages={2027-2038},
abstract={Ultra-wideband (UWB) technology has attracted much attention recently due to its high data rate and low emission power. Its media access control (MAC) protocol, WiMedia MAC, promises a lot of facilities for high-speed and high-quality wireless communication. However, these benefits in turn involve a large amount of computational load, which challenges the traditional uniprocessor architecture based implementation method to provide the required performance. However, the constrained cost and power budget, on the other hand, makes using commercial multiprocessor solutions unrealistic. In this paper, a low-cost and energy-efficient multiprocessor system-on-chip (MPSoC), which tackles at once the aspects of system design, software migration and hardware architecture, is presented for the implementation of UWB MAC layer. Experimental results show that the proposed MPSoC, based on four simple RISC processors and shared-memory infrastructure, achieves up to 45% performance improvement and 65% power saving, but takes 15% less area than the uniprocessor implementation.},
keywords={},
doi={10.1587/transinf.E95.D.2027},
ISSN={1745-1361},
month={August},}

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TY - JOUR
TI - A Low-Cost and Energy-Efficient Multiprocessor System-on-Chip for UWB MAC Layer
T2 - IEICE TRANSACTIONS on Information
SP - 2027
EP - 2038
AU - Hao XIAO
AU - Tsuyoshi ISSHIKI
AU - Arif Ullah KHAN
AU - Dongju LI
AU - Hiroaki KUNIEDA
AU - Yuko NAKASE
AU - Sadahiro KIMURA
PY - 2012
DO - 10.1587/transinf.E95.D.2027
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E95-D
IS - 8
JA - IEICE TRANSACTIONS on Information
Y1 - August 2012
AB - Ultra-wideband (UWB) technology has attracted much attention recently due to its high data rate and low emission power. Its media access control (MAC) protocol, WiMedia MAC, promises a lot of facilities for high-speed and high-quality wireless communication. However, these benefits in turn involve a large amount of computational load, which challenges the traditional uniprocessor architecture based implementation method to provide the required performance. However, the constrained cost and power budget, on the other hand, makes using commercial multiprocessor solutions unrealistic. In this paper, a low-cost and energy-efficient multiprocessor system-on-chip (MPSoC), which tackles at once the aspects of system design, software migration and hardware architecture, is presented for the implementation of UWB MAC layer. Experimental results show that the proposed MPSoC, based on four simple RISC processors and shared-memory infrastructure, achieves up to 45% performance improvement and 65% power saving, but takes 15% less area than the uniprocessor implementation.
ER -