IEICE TRANSACTIONS on Information
Study of Reducing Circuit Scale Associated with Bit Depth Expansion Using Predictive Gradation Detection Algorithm
Summary :
The authors have evaluated a method of expanding the bit depth of image signals called SGRAD, which requires fewer calculations, while degrading the sharpness of images less. Where noise is superimposed on image signals, the conventional method for obtaining high bit depth sometimes incorrectly detects the contours of images, making it unable to sufficiently correct the gradation. Requiring many line memories is also an issue with the conventional method when applying the process to vertical gradation. As a solution to this particular issue, SGRAD improves the method of detecting contours with transiting gradation to effectively correct the gradation of image signals which noise is superimposed on. In addition, the use of a prediction algorithm for detecting gradation reduces the scale of the circuit with less correction of the vertical gradation.
- Publication
- IEICE TRANSACTIONS on Information Vol.E97-D No.5 pp.1283-1292
- Publication Date
- 2014/05/01
- Publicized
- Online ISSN
- 1745-1361
- DOI
- 10.1587/transinf.E97.D.1283
- Type of Manuscript
- PAPER
- Category
- Image Processing and Video Processing
Authors
Akihiro NAGASE
Mitsubishi Electric Corporation,Shizuoka University
Nami NAKANO
Mitsubishi Electric Corporation
Masako ASAMURA
Mitsubishi Electric Corporation
Jun SOMEYA
Mitsubishi Electric Corporation
Gosuke OHASHI
Shizuoka University
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Akihiro NAGASE, Nami NAKANO, Masako ASAMURA, Jun SOMEYA, Gosuke OHASHI, "Study of Reducing Circuit Scale Associated with Bit Depth Expansion Using Predictive Gradation Detection Algorithm" in IEICE TRANSACTIONS on Information,
vol. E97-D, no. 5, pp. 1283-1292, May 2014, doi: 10.1587/transinf.E97.D.1283.
Abstract: The authors have evaluated a method of expanding the bit depth of image signals called SGRAD, which requires fewer calculations, while degrading the sharpness of images less. Where noise is superimposed on image signals, the conventional method for obtaining high bit depth sometimes incorrectly detects the contours of images, making it unable to sufficiently correct the gradation. Requiring many line memories is also an issue with the conventional method when applying the process to vertical gradation. As a solution to this particular issue, SGRAD improves the method of detecting contours with transiting gradation to effectively correct the gradation of image signals which noise is superimposed on. In addition, the use of a prediction algorithm for detecting gradation reduces the scale of the circuit with less correction of the vertical gradation.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.E97.D.1283/_p
Copy
@ARTICLE{e97-d_5_1283,
author={Akihiro NAGASE, Nami NAKANO, Masako ASAMURA, Jun SOMEYA, Gosuke OHASHI, },
journal={IEICE TRANSACTIONS on Information},
title={Study of Reducing Circuit Scale Associated with Bit Depth Expansion Using Predictive Gradation Detection Algorithm},
year={2014},
volume={E97-D},
number={5},
pages={1283-1292},
abstract={The authors have evaluated a method of expanding the bit depth of image signals called SGRAD, which requires fewer calculations, while degrading the sharpness of images less. Where noise is superimposed on image signals, the conventional method for obtaining high bit depth sometimes incorrectly detects the contours of images, making it unable to sufficiently correct the gradation. Requiring many line memories is also an issue with the conventional method when applying the process to vertical gradation. As a solution to this particular issue, SGRAD improves the method of detecting contours with transiting gradation to effectively correct the gradation of image signals which noise is superimposed on. In addition, the use of a prediction algorithm for detecting gradation reduces the scale of the circuit with less correction of the vertical gradation.},
keywords={},
doi={10.1587/transinf.E97.D.1283},
ISSN={1745-1361},
month={May},}
Copy
TY - JOUR
TI - Study of Reducing Circuit Scale Associated with Bit Depth Expansion Using Predictive Gradation Detection Algorithm
T2 - IEICE TRANSACTIONS on Information
SP - 1283
EP - 1292
AU - Akihiro NAGASE
AU - Nami NAKANO
AU - Masako ASAMURA
AU - Jun SOMEYA
AU - Gosuke OHASHI
PY - 2014
DO - 10.1587/transinf.E97.D.1283
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E97-D
IS - 5
JA - IEICE TRANSACTIONS on Information
Y1 - May 2014
AB - The authors have evaluated a method of expanding the bit depth of image signals called SGRAD, which requires fewer calculations, while degrading the sharpness of images less. Where noise is superimposed on image signals, the conventional method for obtaining high bit depth sometimes incorrectly detects the contours of images, making it unable to sufficiently correct the gradation. Requiring many line memories is also an issue with the conventional method when applying the process to vertical gradation. As a solution to this particular issue, SGRAD improves the method of detecting contours with transiting gradation to effectively correct the gradation of image signals which noise is superimposed on. In addition, the use of a prediction algorithm for detecting gradation reduces the scale of the circuit with less correction of the vertical gradation.
ER -
English
