In order to improve the address discharge characteristics, we propose the modified selective reset waveform utilizing the address-bias voltage (Va-bias) during the ramp-up period. It is revealed that the proper Va-bias makes the weak discharge between the address and scan electrodes which plays a role in sufficiently removing the wall charge, thereby contributing to minimizing the wall-voltage variation during the address-period. As a result of adopting the Va-bias in the conventional selective reset driving waveform, it was found that the address discharge delay time can be shortened by approximately 40 ns and the address period of each subfield can be significantly reduced by about 43 µs.

We propose an iterative frequency estimation method for accuracy improvement of discrete Fourier transform (DFT) phase-based methods. It iterates frequency estimation and phase calculation based on the DFT phase-based methods, which maximizes the signal-to-noise floor ratio at the frequency estimation position. We apply it to three methods, the phase difference estimation, the derivative estimation, and the arctan estimation, which are known to be among the best DFT phase-based methods. Experimental results show that the proposed method shows meaningful reductions of the frequency estimation error compared to the conventional methods especially at low signal-to-noise ratio.