A second-order sigma-delta modulator with a 3-b internal quantizer employing the individual level averaging technique has been designed and implemented in a 1.2 µm CMOS technology. Testing results show no observable harmonic distortion components above the noise floor. Peak S/(N+D) ratio of 91 dB and dynamic range of 96 dB have been achieved at a clock rate of 2.56 MHz for a 20 KHz baseband. No tone is observed in the baseband as the amplitude of a 10 KHz input sine wave is reduced from -0.5 dB to -107 dB below the voltage reference. The active area of the prototype chip is 3.1 mm2 and it dissipates 67.5 mW of power from a 5 V supply.