For the RF power amplifier, its exposed input and output are susceptible to damage from Electrostatic (ESD) damage. The bi-direction protection is required at the input in push-pull operating mode. In this paper, considering the process compatibility to the power amplifier, cascaded Grounded-gate NMOS (ggNMOS) and Polysilicon diodes (PDIO) are stacked together to form an ESD clamp with forward and reverse protection. Through Transmission line pulse (TLP) and CV measurements, the clamp is demonstrated as latch-up immune and low parasitic capacitance bi-direction ESD protection, with 18.67/17.34V holding voltage (Vhold), 4.6/3.2kV ESD protection voltage (VESD), 0.401/0.415pF parasitic capacitance (CESD) on forward and reverse direction, respectively.