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[Author] Xiaolei WANG(2hit)

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  • An Approach for Virtual Network Function Deployment Based on Pooling in vEPC

    Quan YUAN  Hongbo TANG  Yu ZHAO  Xiaolei WANG  

     
    PAPER-Network

      Pubricized:
    2017/12/08
      Vol:
    E101-B No:6
      Page(s):
    1398-1410

    Network function virtualization improves the flexibility of infrastructure resource allocation but the application of commodity facilities arouses new challenges for systematic reliability. To meet the carrier-class reliability demanded from the 5G mobile core, several studies have tackled backup schemes for the virtual network function deployment. However, the existing backup schemes usually sacrifice the efficiency of resource allocation and prevent the sharing of infrastructure resources. To solve the dilemma of balancing the high level demands of reliability and resource allocation in mobile networks, this paper proposes an approach for the problem of pooling deployment of virtualized network functions in virtual EPC network. First, taking pooling of VNFs into account, we design a virtual network topology for virtual EPC. Second, a node-splitting algorithm is proposed to make best use of substrate network resources. Finally, we realize the dynamic adjustment of pooling across different domains. Compared to the conventional virtual topology design and mapping method (JTDM), this approach can achieve fine-grained management and overall scheduling of node resources; guarantee systematic reliability and optimize global view of network. It is proven by a network topology instance provided by SNDlib that the approach can reduce total resource cost of the virtual network and increase the ratio of request acceptance while satisfy the high-demand reliability of the system.

  • Latch-Up Immune Bi-Direction ESD Protection Clamp for Push-Pull RF Power Amplifier

    Yibo JIANG  Hui BI  Wei ZHAO  Chen SHI  Xiaolei WANG  

     
    BRIEF PAPER-Semiconductor Materials and Devices

      Pubricized:
    2019/10/09
      Vol:
    E103-C No:4
      Page(s):
    194-196

    For the RF power amplifier, its exposed input and output are susceptible to damage from Electrostatic (ESD) damage. The bi-direction protection is required at the input in push-pull operating mode. In this paper, considering the process compatibility to the power amplifier, cascaded Grounded-gate NMOS (ggNMOS) and Polysilicon diodes (PDIO) are stacked together to form an ESD clamp with forward and reverse protection. Through Transmission line pulse (TLP) and CV measurements, the clamp is demonstrated as latch-up immune and low parasitic capacitance bi-direction ESD protection, with 18.67/17.34V holding voltage (Vhold), 4.6/3.2kV ESD protection voltage (VESD), 0.401/0.415pF parasitic capacitance (CESD) on forward and reverse direction, respectively.