A method is presented that can substantially reduce the memory requirements of non-binary turbo decoders by efficient representation of the extrinsic information. In the case of the duo-binary turbo decoder employed by the IEEE 802.16e standard, the extrinsic information memory can be reduced by about 43%, which decreases the total decoder complexity by 18%. We also show that the proposed algorithm can be implemented by simple hardware architecture.

In this letter, we propose a two-bit representation method for turbo decoder extrinsic information based on bit error count minimization and parameter reset. We show that the performance of the proposed system approaches that of the full precision decoder within 0.17 dB and 0.48 dB at 1 % packet error rate for packet lengths of 500 and 10,000 information bits. The idea of parameter reset we introduce can be used not only in turbo decoder but also in many other iterative algorithms.