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Doo-Hwan KIM Sung-Hyun YANG Kyoung-Rok CHO
This paper proposes a dual-level low voltage differential signaling (DLVDS) circuit aimed at low power consumption and reducing transmission lines for LCD driver IC's. We apply two-bit binary data to the DLVDS circuit as inputs, and then the circuit converts these two inputs into two kinds of fully differential signal levels. In the DLVDS circuit, two transmission lines are sufficient to transfer two-bit binary inputs while keeping the conventional LVDS features. The receiver recovers the original two-bit binary data through a level decoding circuit. The proposed circuit was fabricated using a commercial 0.25 µm CMOS technology. Under a 2.5 V supply voltage, the circuit shows a data rate of 1-Gbps/2-line and power consumption of 35 mW.