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[Author] Hiroki YAMASHITA(3hit)

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  • 25-Gbps 3-mW/Gbps/ch VCSEL Driver Circuit in 65-nm CMOS for Multichannel Optical Transmitter

    Toru YAZAKI  Norio CHUJO  Takeshi TAKEMOTO  Hiroki YAMASHITA  Akira HYOGO  

     
    PAPER

      Vol:
    E101-A No:2
      Page(s):
    402-409

    This paper describes the design and experiment results of a 25Gbps vertical-cavity surface emitting laser (VCSEL) driver circuit for a multi channel optical transmitter. To compensate for the non-linearity of the VCSEL and achieve high speed data rate communication, an asymmetric pre-emphasis technique is proposed for the VCSEL driver. An asymmetric pre-emphasis signal can be created by adjusting the duty ratio of the emphasis signal. The VCSEL driver adopts a double cascode connection that can apply a drive current from a high voltage DC bias and feed-forward compensation that can enhance the band-width for common-cathode VCSEL. For the design of the optical module structure, a two-tier low temperature co-fired ceramics (LTCC) package is adopted to minimize the wire bonding between the signal pad on the LTCC and the anode pad on the VCSEL. This structure and circuit reduces the simulated deterministic jitter from 12.7 to 4.1ps. A test chip was fabricated with the 65-nm standard CMOS process and demonstrated to work as an optical transmitter. An experimental evaluation showed that this VCSEL driver with asymmetric pre-emphasis reduced the total deterministic jitter up to 8.6ps and improved the vertical eye opening ratio by 3% compared with symmetric pre-emphasis at 25Gbps with a PRBS=29-1 test signal. The power consumption of the VCSEL driver was 3.0mW/Gbps/ch at 25Gbps. An optical transmitter including the VCSEL driver achieved 25-Gbps, 4-ch fully optical links.

  • A Low-Power Write Driver for Hard Disk Drives

    Tatsuya KAWASHIMO  Hiroki YAMASHITA  Masayoshi YAGYU  Fumio YUKI  

     
    LETTER

      Vol:
    E89-C No:11
      Page(s):
    1670-1673

    This paper describes a new low-power write driver circuit for mobile hard disk drive preamplifiers. To achieve low power consumption, we developed a write driver circuit with a single-stage MOS transistor as the current driver, which both switches and controls the write current. We also developed a reflection cancellation method to suppress the distortion of the write current waveform during write transition. Fabricated using 0.35-µm SOI-BiCMOS technology, this write driver circuit consumes low power, 380 mW (at 100 MHz).

  • A 50-Gb/s Optical Transmitter Based on a 25-Gb/s-Class DFB-LD and a 0.18-µm SiGe BiCMOS LD Driver

    Takashi TAKEMOTO  Yasunobu MATSUOKA  Hiroki YAMASHITA  Takahiro NAKAMURA  Yong LEE  Hideo ARIMOTO  Tatemi IDO  

     
    PAPER-Optoelectronics

      Vol:
    E99-C No:9
      Page(s):
    1039-1047

    A 50-Gb/s optical transmitter, consisting of a 25-Gb/s-class lens-integrated DFB-LD (with -3-dB bandwidth of 20GHz) and a LD-driver chip based on 0.18-µm SiGe BiCMOS technology for inter and intra-rack transmissions, was developed and tested. The DFB-LD and LD driver chip are flip-chip mounted on an alumina ceramic package. To suppress inter-symbol interference due to a shortage of the DFB-LD bandwidth and signal reflection between the DFB-LD and the package, the LD driver includes a two-tap pre-emphasis circuit and a high-speed termination circuit. Operating at a data rate of 50Gb/s, the optical transmitter enhances LD bandwidth and demonstrated an eye opening with jitter margin of 0.23UI. Power efficiency of the optical transmitter at a data rate of 50Gb/s is 16.2mW/Gb/s.