Mobile computing networks make it possible to offer information access to mobile users. In order to transfer data over mobile networks efficiently, appropriate data transmission control methods for mobile terminals must be established. This paper focuses on spot communication systems to transmit data at high speeds between base stations and mobile terminals. It proposes a flexible and efficient data transmission method that is suitable for spot communication systems. The proposed method transfers subsets of the data to the base stations that are best sited relative to the mobile terminal. This helps to reduce the traffic load of the network significantly. Simulation results confirm the validity of the proposed method. Furthermore, the data receiving time of the mobile terminal, which is an important measure in evaluating the Quality of Service (QoS) for data transmission is analyzed. The result shows that the traffic load in the network is reduced significantly while the QoS is well maintained.

Dynamic Channel Assignment (DCA), which improves the efficiency of channel use in cellular mobile communication systems, requires finding an available channel for a new call after the call origination. This causes the delay which is defined as the time elapsing between call origination and completion of the channel search. For system planning, it is important to evaluate the delay characteristic of DCA because the delay corresponds to the waiting time of a call and influences service quality. It is, however, difficult to theoretically analyze the delay characteristics except its worst case behavior. The time delay of DCA has not been theoretically analyzed. The objective of this paper is analyzing the distribution and the mean value of the delay theoretically. The theoretical techniques in this paper are based on the techniques for analyzing the blocking rate performance of DCA.

Leakage power is predicted to become dominant in the total operation power as the transistor technology gets advanced. Even in the current technology, dramatic increase of leakage power at elevated temperature is a big problem. Burn-in testing, which is typically performed at 125, is facing at difficulties such as throughput degradation or thermal runaway due to increase of leakage power. Reducing leakage power at operation time is essential to solve these problems. We propose a novel approach to make use of an enable signal of a gated-clock technique for reducing active leakage power. A sleep transistor is provided between combinational logic circuits and the ground, and is controlled by the enable signal. When state transitions do not occur in Finite-State-Machines (FSM's), the enable signal becomes low and the state flip-flops keep the data. At the same time, the sleep transistor is turned off so that combinational logic gates are electrically disconnected from the ground to reduce leakage. Simulation results have shown that the proposed scheme reduces active leakage power by 30-60% in 0.18 µm technology. The total power was reduced by 20% at the maximum at 125. It was also found that performance degradation was tolerable for burn-in testing.

We propose a novel simplified Viterbi equalizer for high symbol rate FWA (Fixed Wireless Access) systems carrying 64QAM signals. Reduced complexity and improved performance are achieved adopting two approaches. The first one is reducing the number of survival paths, taking advantage of the large D/U common in LOS (line of sight) communications. The second one is using a multi-stage process to generate desired signal replicas based on their likelihoods. Computer simulations confirm that the proposed replica generation method offers a performance improvement of about 1 dB and the proposed Viterbi equalizer offers reduced complexity with no performance penalty compared to full Viterbi equalizer.