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Keijiro SUZUKI Ryotaro KONOIKE Satoshi SUDA Hiroyuki MATSUURA Shu NAMIKI Hitoshi KAWASHIMA Kazuhiro IKEDA
We review our research progress of multi-port optical switches based on the silicon photonics platform. Up to now, the maximum port-count is 32 input ports×32 output ports, in which transmissions of all paths were demonstrated. The switch topology is path-independent insertion-loss (PILOSS) which consists of an array of 2×2 element switches and intersections. The switch presented an average fiber-to-fiber insertion loss of 10.8 dB. Moreover, -20-dB crosstalk bandwidth of 14.2 nm was achieved with output-port-exchanged element switches, and an average polarization-dependent loss (PDL) of 3.2 dB was achieved with a non-duplicated polarization-diversity structure enabled by SiN overpass waveguides. In the 8×8 switch, we demonstrated wider than 100-nm bandwidth for less than -30-dB crosstalk with double Mach-Zehnder element switches, and less than 0.5 dB PDL with polarization diversity scheme which consisted of two switch matrices and fiber-type polarization beam splitters. Based on the switch performances described above, we discuss further improvement of switching performances.
Tsutomu TOBARI Haruo KOBAYASHI Kenji UCHIDA Hiroyuki MATSUURA Mineo YAMANAKA Shinji KOBAYASHI Tadashige FUJITA Akira MIURA
This paper reports on the design and performance of a very fast Track/Hold (T/H) circuit with GaAs Heterojunction Bipolar Transistor (HBT) to precede a 3GS/s 6 bit ADC. The T/H circuit employs a differential open-loop architecture for high-speed operation, and it consists of diode bridge switches, hold capacitors and output buffers. The differential structure as well as the output buffers suppress droop effects due to the small hFE (20) of our HBT. Measured results show that the T/H circuit has better than 6 bit linearity within an input range of 1.0 Vp-p with power dissipation of 990m W, and the bandwidth is 6 GHz in the track mode. The measured droop rate is 2.1mV/ns, the feedthrough is -46 dB 500 MHz and the hold pedestal is less than 10m V. Also a 3 GHz sampling operation of the T/H circuit was measured. The T/H circuit uses 43 HBTs, 24 Schottky barrier diodes and occupies a chip area of 1.4 1.75 mm2. We also describe the design and performance of a variable, gain amplifier with GaAs HBT to precede the T/H circuit as an input buffer and adjust its gain. These results support the possibility of meeting the requirements for a high-speed ADC system.
Haruo KOBAYASHI Toshiya MIZUTA Kenji UCHIDA Hiroyuki MATSUURA Akira MIURA Tsuyoshi YAKIHARA Sadaharu OKA Daisuke MURATA
This paper describes the design and performance of a high-speed 6-bit ADC using SiGe HBT for measuring-instrument applications. We show that the Gummel-Poon model suffices for SiGe HBT modeling and then we describe that the folding/interpolation architecture as well as simple, differential circuit design are suitable for ADC design with SiGe HBT. Measured results show that the nonlinearity of the ADC is within 1/2 LSB, and the effective bits are 5. 2 bits at an input frequency of 100 MHz and 4. 2 bits at 200 MHz with 768 MS/s. We also describe some design issues for folding/interpolation ADC.
Tsutomu TAKENAKA Atsushi MIYAZAKI Hiroyuki MATSUURA
This paper proposes a novel architecture and MMICs for an integrated 2-32 GHz front-end of a spectrum analyzer. The architecture achieves miniaturization by eliminating the large YIG tracking filter and also achieves multi-octave measurement with less than one octave sweep of the first local oscillator. The MMIC's demonstrate ultra-wideband performances with reduced chip sizes by utilizing newly developed FET cells for power combination, multi-order frequency conversion, low leakage variable resistance, and active impedance translation. The MMIC's are a fundamental/harmonic frequency converter, a variable attenuator, a single-pole triple-throw switch, a single-pole double-throw switch, a distributed pre-amplifier, and an active LC lowpass filter. All the MMIC's are smaller than 1 mm2, except the pre-amplifier and the filter.
Koh UEDA Yojiro MORI Hiroshi HASEGAWA Hiroyuki MATSUURA Kiyo ISHII Haruhiko KUWATSUKA Shu NAMIKI Toshio WATANABE Ken-ichi SATO
This paper presents a fast and large-scale optical circuit-switch architecture for intra-datacenter applications that uses a combination of space switches and wavelength-routing switches are utilized. A 1,440 × 1,440 optical switch is designed with a fast-tunable laser, 8×8 delivery-and-coupling switch, and a 180×180 wavelength-routing switch. We test the bit-error-ratio characteristics of all ports of the wavelength-routing switch using 180-wavelength 10-Gbps signals in the full C-band. The worst switching time, 498 microseconds, is confirmed and all bit-error ratios are acceptable.