A summer-embedded sense amplifier (SE SA) is proposed to reduce feedback loop delay (TFB) in a decision feedback equalizer (DFE). In the SE SA, the position of the ISI compensator is changed from the latch input to the latch output, and hence the TFB is reduced. The simulated DFE achieves 32Gb/s and 66fJ/b with a 1-V 65-nm CMOS process.