In this paper, a CMOS Class-G supply modulation for polar power amplifiers with high average efficiency and low ripple noise is proposed. In the proposed Class-G supply modulation, the parallel supply modulations which are controlled by switch signals are utilized for low power and high power supplies to increase the average efficiency. A low dropout (LDO) is utilized to suppress the delta-modulated noise and provide a low ripple noise power supply. The proposed supply modulation has high efficiency at large output current as the conventional supply modulation, and it also has high efficiency and low ripple noise at the low output current. To verify the effectiveness of the proposed supply modulation, the proposed supply modulation was designed with 0.13 µm CMOS process. The simulation results show that the proposed supply modulation achieves a maximum efficiency of 85.1%. It achieves an average efficiency of 29.3% and a 7.1% improvement compared with the conventional supply modulations with Class-E power amplifier. The proposed supply modulation also shows an excellent spurious free dynamic range (SFDR) of -73 dBc for output envelope signal.

A balanced push-push frequency doubler has been demonstrated in 0.25-µm SOI (Silicon on Insulator) SiGe BiCMOS technology operating from 22 GHz to 29 GHz with high fundamental frequency suppression and high conversion gain. A series LC resonator circuit is connected in parallel with the differential outputs of the doubler core circuit. The LC resonator is effective to improve the fundamental frequency suppression. In addition, the LC resonator works as a matching circuit between the output of the doubler core and the input of the output buffer amplifier, which increases the conversion gain of the whole circuit. A measured fundamental frequency suppression of greater than 46 dBc is achieved at an input power of -10 dBm in the output frequency band of 22-29 GHz. Moreover, maximum fundamental frequency suppression of 66 dBc is achieved at an input frequency of 13 GHz and an input power of -10 dBm. The frequency doubler works at a supply voltage of 3.3 V.

A broadband balanced frequency doubler has been demonstrated in 0.25-µm SOI SiGe BiCMOS technology to operate from 22 GHz to 30 GHz. The measured fundamental frequency suppression of greater than 30 dBc is achieved by an internal low pass LC filter. In addition, a pair of matching circuits in parallel with the LO inputs results in high suppression with low input drive power. Maximum measured conversion gain of -6 dB is obtained at the input drive power as low as -1 dBm. The results presented indicate that the proposed frequency doubler can operate in broadband and achieve high fundamental frequency suppression with low input drive power.