A balanced push-push frequency doubler has been demonstrated in 0.25-µm SOI (Silicon on Insulator) SiGe BiCMOS technology operating from 22 GHz to 29 GHz with high fundamental frequency suppression and high conversion gain. A series LC resonator circuit is connected in parallel with the differential outputs of the doubler core circuit. The LC resonator is effective to improve the fundamental frequency suppression. In addition, the LC resonator works as a matching circuit between the output of the doubler core and the input of the output buffer amplifier, which increases the conversion gain of the whole circuit. A measured fundamental frequency suppression of greater than 46 dBc is achieved at an input power of -10 dBm in the output frequency band of 22-29 GHz. Moreover, maximum fundamental frequency suppression of 66 dBc is achieved at an input frequency of 13 GHz and an input power of -10 dBm. The frequency doubler works at a supply voltage of 3.3 V.
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Jiangtao SUN, Qing LIU, Yong-Ju SUH, Takayuki SHIBATA, Toshihiko YOSHIMASU, "A 66-dBc Fundamental Suppression Frequency Doubler IC for UWB Sensor Applications" in IEICE TRANSACTIONS on Electronics,
vol. E94-C, no. 4, pp. 575-581, April 2011, doi: 10.1587/transele.E94.C.575.
Abstract: A balanced push-push frequency doubler has been demonstrated in 0.25-µm SOI (Silicon on Insulator) SiGe BiCMOS technology operating from 22 GHz to 29 GHz with high fundamental frequency suppression and high conversion gain. A series LC resonator circuit is connected in parallel with the differential outputs of the doubler core circuit. The LC resonator is effective to improve the fundamental frequency suppression. In addition, the LC resonator works as a matching circuit between the output of the doubler core and the input of the output buffer amplifier, which increases the conversion gain of the whole circuit. A measured fundamental frequency suppression of greater than 46 dBc is achieved at an input power of -10 dBm in the output frequency band of 22-29 GHz. Moreover, maximum fundamental frequency suppression of 66 dBc is achieved at an input frequency of 13 GHz and an input power of -10 dBm. The frequency doubler works at a supply voltage of 3.3 V.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E94.C.575/_p
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@ARTICLE{e94-c_4_575,
author={Jiangtao SUN, Qing LIU, Yong-Ju SUH, Takayuki SHIBATA, Toshihiko YOSHIMASU, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 66-dBc Fundamental Suppression Frequency Doubler IC for UWB Sensor Applications},
year={2011},
volume={E94-C},
number={4},
pages={575-581},
abstract={A balanced push-push frequency doubler has been demonstrated in 0.25-µm SOI (Silicon on Insulator) SiGe BiCMOS technology operating from 22 GHz to 29 GHz with high fundamental frequency suppression and high conversion gain. A series LC resonator circuit is connected in parallel with the differential outputs of the doubler core circuit. The LC resonator is effective to improve the fundamental frequency suppression. In addition, the LC resonator works as a matching circuit between the output of the doubler core and the input of the output buffer amplifier, which increases the conversion gain of the whole circuit. A measured fundamental frequency suppression of greater than 46 dBc is achieved at an input power of -10 dBm in the output frequency band of 22-29 GHz. Moreover, maximum fundamental frequency suppression of 66 dBc is achieved at an input frequency of 13 GHz and an input power of -10 dBm. The frequency doubler works at a supply voltage of 3.3 V.},
keywords={},
doi={10.1587/transele.E94.C.575},
ISSN={1745-1353},
month={April},}
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TY - JOUR
TI - A 66-dBc Fundamental Suppression Frequency Doubler IC for UWB Sensor Applications
T2 - IEICE TRANSACTIONS on Electronics
SP - 575
EP - 581
AU - Jiangtao SUN
AU - Qing LIU
AU - Yong-Ju SUH
AU - Takayuki SHIBATA
AU - Toshihiko YOSHIMASU
PY - 2011
DO - 10.1587/transele.E94.C.575
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E94-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2011
AB - A balanced push-push frequency doubler has been demonstrated in 0.25-µm SOI (Silicon on Insulator) SiGe BiCMOS technology operating from 22 GHz to 29 GHz with high fundamental frequency suppression and high conversion gain. A series LC resonator circuit is connected in parallel with the differential outputs of the doubler core circuit. The LC resonator is effective to improve the fundamental frequency suppression. In addition, the LC resonator works as a matching circuit between the output of the doubler core and the input of the output buffer amplifier, which increases the conversion gain of the whole circuit. A measured fundamental frequency suppression of greater than 46 dBc is achieved at an input power of -10 dBm in the output frequency band of 22-29 GHz. Moreover, maximum fundamental frequency suppression of 66 dBc is achieved at an input frequency of 13 GHz and an input power of -10 dBm. The frequency doubler works at a supply voltage of 3.3 V.
ER -