In this paper, Epitaxial (Epi) Junction Termination Extension (JTE) technique for silicon carbide (SiC) power device is presented. Unlike conventional JTE, the Epi-JTE doesn't require high temperature (about 500°C) implantation process. Thus, it doesn't require high temperature (about 1700°C) process for implanted dose activation and surface defect curing. Therefore, the manufacturing cost will be decreased. Also, the fabrication process is very simple because the dose of the JTE is controlled by epitaxy growth. The blocking characteristic is analyzed through 2D-simulation for the proposed Epi-JTE. In addition, the effect was validated by experiment of fabricated SiC device with the Single-Zone-Epi-JTE. As a result, it has blocking capability of 79.4% compared to ideal parallel-plane junction breakdown.