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Eiji TAKEDA Digh HISAMOTO Kaori NAKAMURA
A new SOI device structure--a fully DEpleted Lean channel TrAnsistor (DELTA)--which has a new vertical gate structure and an ultra-thin film, bulk Si SOI structure, is proposed. Through experiments and simulation, its fabrication processes and device characteristics are discussed. By using such a new device structure, crystal quality problems caused by recrystallization of poly-Si are solved. DELTA provides a 7.5 times larger channel current than that of conventional planar MOSFETs with the same mask layouts. This is due to a vertical channel structure and a thin film effect. Also, DELTA shows an excellent subthreshold swing of 62 mV/decade. Furthermore, by using a two-carrier device simulator, the punchthrough phenomena in thin film SOI MOSFETs are reexamined from the viewpoint of hole behavior in the substrate. As a result, it was found that the punchthrough resistance of thin film SOI MOSFETs is not always stronger than that of conventional ones. Despite disappearance of the so-called substrate floating effects, attention will still have to be paid to hole behavior in realizing sophisticated SOI devices.