A 250-622 MHz clock buffer has been developed, using a two-loop architecture: a delay-locked loop (Dll) for deskew, and a frequency-locked loop(FLL) for reference frequency supply to the DLL. The DLL incorporates a current-mode phase detector newly developed which utilizes a flip-flop metastability to detect a phase difference in the order of 20 ps. A measured jitter is suppressed to less than 40 ps RMS over the operating frequency range. A DLL acquisition time of 150 ns typical is simulated at 400 MHz. A 0.4µm CMOS technology is used to fabricate the chip.

A method is presented for implementing a neural control system for controlling a piezopolymer bimorph flexible micro-actuator. Two neural controllers were constructed, both with an adaptive-type neural identifier and a learning-type direct or open-loop neural controller, focusing on the difference in learning speed between the adaptive and learning schemes. Simulated use of the proposed controllers to control a flexible micro-actuator showed that they can do so effectively. Experiments also demonstrated that a neural controller can be used to control a flexible micro-actuator.