A distribution of offset voltage of transistor pairs having fine pattern emitter down to 0.5 µm wide required for a parallel A/D converter can digitize at more than 200 MHz were measured. Moreover, contributions of transistor parameters to offset voltage and a realization of the ultra-high speed A/D converter were discussed. As the result, it was shown that the main transistor parameter contributes to the offset voltages is a fluctuation of a current gain, and a contribution of a emitter contact resistance was not so large. And the realization of 6 bit, 1 GHz or 8 bit, 750 MHz A/D converter was obtained.