A single-chip 512-point FFT processor is presented. This processor is based on the cached-memory architecture (CMA) with the resource-saving multi-datapath radix-23 computation element. The 2-stage CMA, including a pair of single-port SRAMs, is also introduced to speedup the execution time of the 2-dimensional FFTs. Using the above techniques, we have designed an FFT processor core which integrates 552,000 transistors within an area of 2.82.8 mm2 with CMOS 0.35 µm triple-layer-metal process. This processor can execute a 512-point, 36-bit-complex fixed-point data format, 1-dimensonal FFT in 23.2 µsec and a 2-dimensional one in only 23.8 msec at 133 MHz operation. The power consumption of this processor is 439.6 mW at 3.3 V, 100 MHz operation.

This paper describes a defect detection method which automatically extracts defect information from complicated background LSI patterns. Based on a scanning electron microscope (SEM) image, the defects on the wafer are characterized in terms of their locations, sizes and the shape of defects. For this purpose, two image processing techniques, the Hough transform and wavelet transform, have been employed. Especially, the Hough Transform for circles is applied to non-circular defects for estimating the shapes of defects. By experiments, it has been demonstrated that the system is very effective in defect identification and will be used as an integral part in future automatic defect pattern classification systems.