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Akio WAKEJIMA Kazuki OTA Kohji MATSUNAGA Masaaki KUZUHARA
This paper describes high power density and low distortion characteristics of a novel InGaP channel field-modulating plate FET (InGaP FP-FET) under high voltage operation of over 50 V. The developed InGaP FP-FET exhibited an extremely high breakdown voltage of 100 V with an impact ionization coefficient about 103 times smaller than that of GaAs. These superior breakdown characteristics indicate that the InGaP FP-FET is one of the most desirable device structures for high-voltage high-power operation. The InGaP FP-FET delivered an output power density of 1.6 W/mm at 1.95 GHz operated at a drain bias voltage of 55 V. As power operation moves from class A to class AB, both 3rd-order intermodulation distortion (IM3) and power-added efficiency (PAE) at higher output-power region were improved, resulting from a suppressed gate leakage current near the power saturation point. These results promise that the developed InGaP FP-FET is suited for applications in which both high efficiency and low distortion are required.
Akio WAKEJIMA Kohji MATSUNAGA Yuji ANDO Tatsuo NAKAYAMA Yasuhiro OKAMOTO Kazuki OTA Naotaka KURODA Masahiro TANOMURA Hironobu MIYAMOTO
This paper describes a high power GaN-FET amplifier which is developed for wideband code division multiple access (W-CDMA) base stations. We design a bias network which is symmetrically arranged to the RF line (two way bias network) in order to reduce impedance at a baseband frequency of the multi-carrier W-CDMA signal. As a result, the amplifier with the two way bias network successfully suppressed memory effects. Therefore, the application of a DPD technique to the GaN-FET amplifier with the two way bias network demonstrates almost 20 dB linearity improvement in IM3 and considerable improvement in higher order IMD, resulting in low IMD of less than -50 dBc at the highest ever reported W-CDMA average output power of 76 W.
Kohji MATSUNAGA Yasuhiro OKAMOTO Mikio KANAMORI
This paper describes amplification with improved linearity by employing a linearizing circuit in an input circuit of an internally-matched Ku-band high power amplifier. The linearizing circuit is composed of series L, C, R and an FET with grounded source and drain, and is connected between the input signal line and ground. This linearizing circuit was applied to a Ku-band 10 W output power amplifier utilizing a 25.2 mm gate-width double-doped Heterojunction FET. The power amplifier demonstrated a 8 dB reduction of the third-order intermodulation at about 6 dB output power backoff point from the 2 dB output compression point.
Yasuhiro OKAMOTO Kohji MATSUNAGA Mikio KANAMORI Masaaki KUZUHARA Yoichiro TAKAYAMA
A buried gate AlGaAs/InGaAs heterojunction FET (HJFET) with gate breakdown voltage of 30 V was examined for high drain bias (higher than 10 V) operation. High breakdown voltage was realized due to the optimization of the narrow recess depth. A 1.4 mm HJFET has exhibited an output power of 30.2 dBm (1050 mW) with 50% power added efficiency (PAE) and 12.1 dB linear gain at 12 GHz with a 13 V drain bias. An internal matching circuit for a 16.8 mm HJFET was designed using a large-signal load impedance determined from load-pull measurement. The 16.8 mm internally-matched HJFET has delivered 38.9 dBm (7.8 W) output power with 46% PAE and 11.6 dB linear gain at 12 GHz with a drain bias of 13 V. This is the first report of higher than 10 V operation of an X- and Ku-band power HJFET with the excellent power performance.