A completely-digital, on-chip performance monitor is newly proposed in this paper. In addition to a traditional ring oscillator, the proposed monitor has a special buffer chain whose output duty ratio is emphasized by the difference between NMOS and PMOS performances. Thus the performances of NMOS and PMOS transistor can accurately be estimated independently. By using only standard cells, the monitor achieves a small occupied area and process portability. To demonstrate the accuracy of performance estimation and the usability of the monitor, we have fabricated the proposed monitor using 90 nm CMOS process. The estimated errors of the drain saturation current of NMOS and PMOS transistors are 2.0% and 3.4%, respectively. A D/A converter has been also fabricated to verify the usability of the proposed monitor. The output amplitude variation of the D/A converter is successfully reduced to 50.0% by the calibration using the proposed monitor.

One of the problems in multi-carrier modulation is nonlinear distortion due to nonlinearity of channels, such as in HPA (High Power Amplifier). This problem is also true of multi-carrier SS (Spread Spectrum) systems. In this paper, an inter-modulation compensation scheme for multi-carrier M-ary/SS system is proposed. We propose two methods to control the sequences transmitted in parallel to avoid the occurrence of severe inter-modulation distortion. One is the "package sequence selection" method, which requires slight redundancy. The other method is based on error correction code, which requires no additional frequency or power except the redundancy for error correction. We confirm the validity of our proposed scheme by computer simulation, and the BER (Bit Error Rate) performance in an AWGN (Additive White Gaussian Noise) channel is presented.