In this paper, methods to analyze the convergence and steady-state characteristics of an adaptive notch filter with two input structure are proposed. The adaptive detection of a sinusoid with additive Gaussian noises has been investigated. Expressions for the necessary iteration of convergence are derived. An analysis of steady-state coefficient error has been also obtained. The analysis of this paper clarifies the effects of colored Gaussian noise and the noise correlation between primary input and reference input. Finally, the results of computer simulations are shown which confirm the theoretical predictions.

This paper presents techniques for generating the input patterns for locating logic design errors (PLE's) by Boolean function manipulation based on binary decision diagrams (BDD's). One PLE has one Boolean variable X or and constant values. A primary output of a correct circuit takes value X, while the designed circuit takes either 0 or 1. By using PLE's, the X-algorithms locate single or multiple logic design errors in a combinational circuit. Although PLE's play the most important role in the X-algorithms, the condition under which PLE's exist has not been formalized. This paper gives a formal analysis on the existence condition of PLE's. It is shown that the condition is always satisfied by incorporating another type of PLE. From the condition, an implicit representation of PLE's is derived. In addition, two kinds of approaches are presented for generating PLE's by Boolean function manipulation based on BDD's. One is an approach for generating all the existing PLE's. The other is a heuristic approach to obtain a limited number of PLE's in a short time. Both approaches generate PLE's including don't cares. Incorporating them, a compact representation of PLE is achieved. Experimental results have shown the compactness of the proposed representations and the availability of the pattern generation techniques.

This paper presents the EXM-algorithm, which locates multiple logic design errors in a combinational circuit with multiple output. The error possibility index and the six-valued simulation method have been enhanced to be applied to multiple output circuit. The algorithm locates multiple errors even if they belong to different cone circuits, and processes faster than the conventional EX-algorithm for circuits with the similar gate sizes. Experimental results have shown that the algorithm locates all errors at high hit ratio for ISCAS benchmark circuits and some other circuits.

In this letter, a method to analyze the steady-state characteristics of multirale IIR adaptive notch filter is proposed. A closed-form expression for the steady-state mean square error of variable coefficient has been obtained. The results of computer simulation are shown which confirm the theoretical prediction.

This paper presents a Reconfigurable Machine (RM). capable of efficiently implementing a wide range of computationlly complex algorithms. Its highly flexble architecture combining FPGA's with RAM's supports a wide range of applications. Since its "gate-level programmability" allows us to implement various kinds of parallel processing techniques, RM provides a perfomance comparable to exising "special-purpose" engines. The in-circuit reconfiguration capability of FPGA's is used to reload several kinds of configuration data during power on. Thus, RM behaves itself like a general-purpose computer applicable to various kinds of applications by loading programs. A Reconfigurable Machine-(RM-) has been built as the first prototype incorporating five FPGA's and four SRAM memory banks. RM- has been applied to a multiple-delay Logic Simulator (LSIM). Employing pipeline architecture, LSIM has achieved a perfomance of l million gate events per second at 4MHz. The concept of RM is the best solution to the trade-offs between general-purpose machines and special-purpose ones. RM will be a hardware platform accelerating a wide range of applications, also offering an interesting problem in high-level synthesis.

A lossless image compression method based on two-dimensional (2D) linear prediction with variable coefficients is proposed. This method employs a space varying autoregressive (AR) model. To achieve a higher compression ratio, the method introduces new ideas in three points: the level conversion, the fast recursive parameter estimation, and the switching method for coding table. The level conversion prevents an AR model from predicting gray-level which does not exist in an image. The fast recursive parameter estimation algorithm proposed here calculates varying coefficients of linear prediction at each pixel in shorter time than conventional one. For encoding, the mean square error between the predicted value and the true one is calculated in the local area. This value is used to switch the coding table at each pixel to adapt it to the local statistical characteristics of an image. By applying the proposed method to "Girl" and "Couple" of IEEE monochromatic standard images, the compression ratios of 100 : 46 and 100 : 44 have been achieved, respectively. These results are superior to the best results (100 : 61 and 100 : 57) obtained by the approach under JPEG recommendations.