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[Author] Kun-Yi LIN(2hit)

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  • A Sub 1 V 2.4 GHz CMOS Variable-Gain Low Noise Amplifier

    Chih-Lung HSIAO  Ro-Min WENG  Kun-Yi LIN  Hung-Che WEI  

     
    LETTER

      Vol:
    E87-C No:6
      Page(s):
    1003-1004

    A low supply voltage CMOS variable-gain low noise amplifier (LNA) is presented in this paper. A folded cascode structure is used to reduce the supply voltage to only 1 V. The conversion gain of the LNA can be controlled by the bias voltage of the connon-gate transistor. When the input signal is weak, the circuit works at high-gain mode to improve the sensitivity. Otherwise, when the input signal is strong, the circuit works at low-gain mode to increase the linearity.

  • A 2 V 2.4 GHz Fully Integrated CMOS LNA with Q-Enhancement Circuit for SOC Design

    Chih-Lung HSIAO  Ro-Min WENG  Kun-Yi LIN  

     
    PAPER

      Vol:
    E86-C No:6
      Page(s):
    1050-1055

    A fully integrated 2 V 2.4 GHz CMOS low-noise amplifier (LNA) is presented in this paper. A negative resistance circuit is used to reduce the parasitic resistors of the on-chip spiral inductor and increase the quality factor (Q). An inductor is added to the common-source and common-gate transistors of the cascode circuit to improve matching and increase power gain. The LNA is designed according to the tsmc 1P4M 0.35 µm process. The parasitic effect of the on-chip spiral inductor was considered. With a 2 V supply, the power gain of the LNA is 19.5 dB, the noise figure is 2.7 dB, and the power dissipation is 15.2 mW. The input third-order intercept point (IIP3) is 0 dBm. The input -1 dB compression point (P-1dB) is -13.9 dBm. The reverse isolation S12 is -44.1 dB.