This paper reports on the use of microelectronic test structures to characterise a novel fabrication technique for thin-film electronic circuit boards. In this technology circuit tracks are formed on paper-like substrates by depositing films of a metal-loaded ink via a standard lithographic printing process. Sheet resistance and linewidth for both horizontal and vertical lines are electrically evaluated and these compared with optical and surface profiling measurements.

The objective, when mapping a wafer, is to capture the the full variation across the wafer while minimising the number of measurements. This is a very similar objective to that of experimental design and this paper applies classical Design Of Experiment (DOE) techniques to the selection of measurement points for wafer mapping. The resulting measurements are then fitted using Response Surface Methodology (RSM) from which contour plots or wafer maps can be generated. The accuracy of the fit can be ascertained by inspection of the adjusted R2 value and it is demonstrated that in many cases transformations can be used to improve the accuracy of the resulting wafer maps.