Human gait analysis has been widely used in medical and health fields. It is essential to extract spatio-temporal gait features (e.g., single support duration, step length, and toe angle) by partitioning the gait phase and estimating the footprint position/orientation in such fields. Therefore, we propose a method to partition the gait phase given a foot position sequence using mutually constrained piecewise linear approximation with dynamic programming, which not only represents normal gait well but also pathological gait without training data. We also propose a method to detect footprints by accumulating toe edges on the floor plane during stance phases, which enables us to detect footprints more clearly than a conventional method. Finally, we extract four spatial/temporal gait parameters for accuracy evaluation: single support duration, double support duration, toe angle, and step length. We conducted experiments to validate the proposed method using two types of gait patterns, that is, healthy and mimicked hemiplegic gait, from 10 subjects. We confirmed that the proposed method could estimate the spatial/temporal gait parameters more accurately than a conventional skeleton-based method regardless of the gait pattern.

Patch clamp measurement technique is one of the most important techniques in the field of electrophysiology. The elucidation of the channels, nerve cells, and brain activities as well as contribution of the treatment of neurological disorders is expected from the measurement of ion current. A current-to-voltage converter, which is the front end circuit of the patch clamp measurement system is fabricated using 0.18µm CMOS technology. The current-to-voltage converter requires a resistance as high as 50MΩ as a feedback resistor in order to ensure a high signal-to-noise ratio for very small signals. However, the circuit becomes unstable due to the large parasitic capacitance between the poly layer and the substrate of the on-chip feedback resistor and the instability causes the peaking at lower frequency. The instability of a current-to-voltage converter with a high-resistance as a feedback resistor is analyzed theoretically. A compensation circuit to stabilize the amplifier by driving the N-well under poly resistor to suppress the effect of parasitic capacitance using buffer circuits is proposed. The performance of the proposed circuit is confirmed by both simulation and measurement of fabricated chip. The peaking in frequency characteristic is suppressed properly by the proposed method. Furthermore, the bandwidth of the amplifier is expanded up to 11.3kHz, which is desirable for a patch clamp measurement. In addition, the input referred rms noise with the range of 10Hz ∼ 10kHz is 2.09 Arms and is sufficiently reach the requirement for measure of both whole-cell and a part of single-channel recordings.