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[Author] Masanori TSUNOTANI(2hit)

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  • A GaAs 88 Self-Routing Switch LSI for ATM Switching System

    Shouhei SEKI  Hiroyuki YAMADA  Masanori TSUNOTANI  Yoshiaki SANO  Yasushi KAWAKAMI  Masahiro AKIYAMA  

     
    PAPER

      Vol:
    E75-C No:10
      Page(s):
    1127-1132

    This paper describes the architecture and the performances of a GaAs 88 self-routing switch LSI for ATM switching system. The communication system such as broadband integrated sevices digital network (B-ISDN) requires the hardware switch LSI which exchanges packet cells at a date rate up to several Gb/s. GaAs LSIs are suitable for such application because of its high speed operation and low power dissipation. To clarify the feasibility of GaAs LSI, an 88 self-routing switch LSI is fabricated using 0.5 µm gate GaAs MESFETs and its oerformances are examined. This LSI consists of a switching network for exchanging the packet cells and the "NEMAWASHI" network which detects the cell destined to the same output port. The basic network architecture is a self-routing switch using Batcher-Banyan network. This network consists of basic 22 switch element. Since each element switches the route accorging to the destination of the input cells, self-routing operation is performed without the external circuit for routing control. The LSI is fabricated using 0.5 µm gate GaAs MESFETs. 7003 logic gate are integrated on the chip of 8.2 mm7.4 mm. To reduce the impedance of ground line on the chip and to obtain the enough noise margin, the third level interconnection with low sheet resistance is implemented. As the results of functional evalution, the full function of switching network and "NEMAWASHI" network are verified. Maximum operation speed of 1 GHz is obtained.

  • The Recovery Process of RIE-Damage in InGaAs/AlGaAs PHEMT Using Recombination Enhanced Defect Reaction

    Shinichi HOSHI  Takayuki IZUMI  Tomoyuki OHSHIMA  Masanori TSUNOTANI  Tamotsu KIMURA  

     
    PAPER-Hetero-FETs & Their Integrated Circuits

      Vol:
    E84-C No:10
      Page(s):
    1350-1355

    The reduction of the drain current for InGaAs/AlGaAs pseudomorphic high electron mobility transistors (PHEMTs) has been observed due to the RIE-damage induced under the gate region. However, it has been found that the drain current can be recovered after the gate-drain reverse current stress even at room temperature. The recovery rate of the drain current strongly depends on the gate-drain reverse current density. The activation energy of the recovery rate has been confirmed to decrease from 0.531 eV to 0.119 eV under the gate-drain reverse current stress. This phenomenon can be understood as a recombination enhanced defect reaction of holes generated by the avalanche breakdown. The non-radiative recombination of holes at the defect level is believed to enhance the recovery of the RIE-damage.