1-3hit |
Masayoshi SAKAI Masakazu KATO Koichi FUTSUHARA Masao MUKAIDONO
This paper first clarifies the logic construction of safety control for the operation of a power press and then describes fail-safe dual two-rail system signal processing and fail-safe multiple-valued logic operations as methods for achieving this control as a fail-safe system. It finally shows a circuit for generating fail-safe two-rail run button signals based on ternary logic for concrete operation of the power press and an operation control circuit for confirming brake performance for each cycle of slide operation by using the run button signals. The control circuit uses such multiple-valued logic operations that binary logic signals that do not erroneously go logic 1 are added to a multiple-valued logic signal and the multiple-valued logic signal is converted to a binary logic signal that does not erroneously go logic 1 by a threshold operation.
Yuichi KIMURA Atsuo SENGA Masayoshi SAKAI Misao HANEISHI
This paper presents design of an alternating-phase fed single-layer slotted waveguide array for a sector shaped beam in the E-plane radiation pattern. A sector beam pattern is very effective for radar applications for detecting obstacles in a certain angular range without mechanical or electronic scanning. The sector shaped beam with 13 degree beam width is synthesized by a cascade of T-junctions in the feed waveguide which excite the radiating waveguides with a longitudinal shunt slot array. In order to realize the required excitation distribution of the radiating waveguides for the sector shaped beam, 30 T-junctions with symmetrical arrangement are designed by tuning a width of the coupling window, an offset of the window, and a width of the feed waveguide cascaded to the subsequent T-junction, respectively. Design and measurement are performed in 60 GHz band. The prototype antenna assembles easily; the slotted plate is just tacked on the groove feed structure and is fixed by screws at the periphery, which is the key advantage of the alternating-phase fed arrays. The measured sector pattern with low sidelobe level agrees well with the predicted one. Validity of the sector beam design as well as the performance of the alternating-phase fed array is confirmed by the measurement.
Masakazu KATO Masayoshi SAKAI Koji JINKAWA Koichi FUTSUHARA Masao MUKAIDONO
A fail-safe logic operation refers to such a processing operation that the output assumes the logical value zero when the operation circuit fails. The fail-safe multiple-valued logic operation is proposed as one method of logic operation. Section 2 defines the fail-asfe multiple-valued logic operation and presents an example of method for accomplishing the fail-safe multiple-valued logic operation. Section 3 describes the method of designing a fail-safe threshold operation device (window comparator) as basic device in the fail-safe multiple-valued logic operation in consideration of LSI implementation and shows an example of prototype fail-safe window comparator. This operation device has higher and lower thresholds. It oscillates and produces an operational output signal only when the input signal level falls between the higher and lower thresholds. Unless the fail-safe window comparator is supplied with input signals of higher voltage than the power supply voltage, it dose not form a feedbadk loop as required for it to oscillate. This characteristic prevents the device from erroneously producing an output signal when any failure occurs in the amplifiers comprising the oscillation circuit. The window comparator can be built as a fail-safe threshold operation device. The fail-safe characteristic is utilized in its LSI implementation. Section 4 verifies the fail-safe property of the prortotype fail-safe window comparator. It is shown that even when the LSI develops failures not evident from outsid (latent failures), it does not lose the operational function and maintains the fail-safe characteristic.