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Massimo CONTI Simone ORCIONI Claudio TURCHETTI
Artificial Neural Networks (ANN's) that are able to learn exhibit many interesting features making them suitable to be applied in several fields such as pattern recognition, computer vision and so forth. Learning a given input-output mapping can be regarded as a problem of approximating a multivariate function. In this paper we will report a theoretical framework for approximation, based on the well known sequences of functions named approximate identities. In particular, it is proven that such sequences are able to approximate a generally continuous function to any degree of accuracy. On the basis of these theoretical results, it is shown that the proposed approximation scheme maps into a class of networks which can efficiently be implemented with analog MOS VLSI or BJT integrated circuits. To prove the validity of the proposed approach a series of results is reported.
Massimo CONTI Paolo CRIPPA Giovanni GUAITINI Simone ORCIONI Claudio TURCHETTI
In this paper CMOS VLSI circuit solutions are suggested for on-chip learning and weight storage, which are simple and silicon area efficient. In particular a stochastic learning scheme, named Random Weight Change, and a multistable weight storage approach have been implemented. Additionally, the problems of the influence of technological variations on learning accuracy is discussed. Even though both the learning scheme and the weight storage are quite general, in the paper we will refer to a class of networks, named Approximate Identity Neural Networks, which are particularly suitable to be implemented with analog CMOS circuits. As a test vehicle a small network with four neurons, 16 weights, on chip learning and weight storage has been fabricated in a 1.2 µm double-metal CMOS process.
In this paper an analog CMOS implementation of Approximate Identity Neural Networks is suggested. In particular a one-input one-output Neural Network with 6 neurons has been designed and fabricated with a 2µm CMOS technology. Due to the small area occupied the circuit proposed for the neuron is suited for the implementation of larger networks.