A novel CMOS level converter with balanced rise and fall delays for arbitrary voltage conversion is presented. The proposed level converter was designed using a 90 nm CMOS process technology. The comparison result indicates that the maximum difference between the rise and fall delays of the proposed level converter was reduced by up to 92% compared to the conventional CMOS level converters.

In this letter, we propose an enhanced gentle distributed coordination function (GDCF), which is a simple and effective collision resolution mechanism, to improve the performance of IEEE 802.11 DCF. We compare performance of the enhanced GDCF with that of the legacy DCF and the conventional GDCF via analysis and simulations. The enhanced GDCF introduces a new counter to check the number of consecutively successful transmissions, and the maximum permitted values of the counter differ for different backoff stages. The proposed GDCF is shown to have performance superior to that of the conventional GDCF for various combinations of contending stations and frame length.