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Peng WANG Chao ZHANG Nan HUA De-peng JIN Lie-guang ZENG
A highly integrated monolithic Multi-Service Transport Platform (MSTP) ASIC MSEOSX8-6 incorporating more than 26M transistors has been fabricated with 0.18 µm CMOS technology. The chip is a powerful monolithic MSTP ASIC that supports RPR applications and serves as a generic building block for MSTP network. To accelerate the chip design, we devise a novel methodology called Embedded Reduced Self-Tester (ERST), which integrates the reduced self-tester structure into the chip to shorten the duration of dynamic simulation. Moreover, we divide the design into 12 smaller Hierarchical Layout Blocks (HLB) to enable parallel layout. Resultantly, the whole design has been completed in 5 months, which saves at least 80% of the design cycle in all.
Yanan HUANG Xuming FANG Yue ZHAO
Being a new feature of next generation of wireless networks, Mobile Multi-hop Relay (MMR) is proposed for the purpose of coverage extension and throughput enhancement in LTE-Advanced, IEEE 802.16 j/m. Besides, with the help of relay, the system energy consumption could be well saved. In this paper, an energy saving scheduling scheme is proposed for OFDMA based two-hop relay systems. The novel scheme adjusts the modulation and coding (MC) mode and allocates the transmit power dynamically according to the resource intensity. It can also guarantee the Quality of Service (QoS) of different services by setting the scheduling priority. The simulation results show that the novel scheduling scheme can reduce energy consumption up to 76.27% compared to the conventional scheduling scheme, and achieve higher throughput while guaranteeing QoS.