This paper describes a digital delay-lock Loop (DLL) to which delta-sigma (Δ Σ) modulation technique is applied in order to reduce circuit elements. The DLL is evaluated in both transient and steady-state behavior by theoretical analysis, computer simulations and circuit experiments. Not deteriorated by the internally generated Δ Σ-modulation noise, the DLL shows good tracking performance in transient response and steady-state RMS jitter of phase error against additive white Gaussian noise. Using the proposed DLL most parts of receiving circuits are realized by digital integrated circuits. After realizing the circuit, power-line communication system with spread spectrum is possibly expected in a small size with low cost.