A 155-Mb/s 3232 Si bipolar switch LSI is designed and implemented for a wide application in the broad-band ISDN. The operating speed is 1.4 GHz using an A-BSA Si bipolar process. Its throughput is 5.0 Gb/s by handling four 1.4-GHz interfaces, each of which supports an eight-channel multiplexed data stream. To realize a highly integrated high-speed bipolar LSI, power consumption and chip area should be reduced. Two technologies are newly developed for the LSI, namely, 1) active pull-down circuit with an embedded bias circuit in each gate, and 2) modified standard cell with overlapped cell-channel structure. Using these technologies, total power consumption and chip area are reduced to 60% and 70%, respectively, of what is expected when conventional ECL technologies and standard cell structures are used. The LSI evaluation results show that the developed LSI has sufficient performance to realize a large-scale B-ISDN switching system.