The fairness algorithm of the Resilient Packet Ring IEEE 802.17 standard suffers from throughput degradation under an unbalanced overload. This letter proposes an enhanced fairness algorithm using a valuable piece of information, represented by the transit buffer length, about congestion alleviation on a congested node, under which the throughput degradation can be completely improved.

While spatial reuse in a high-speed ring increases the throughput performance, it leads to a fairness problem in distributing the network bandwidth among distinct nodes. To alleviate this problem, fairness control algorithms based on a packet window have been developed. Under these algorithms, satisfied nodes are forced to pass empty slots to starved downstream nodes until their windows are refilled by a reset signal. This regulation incurs a bandwidth waste corresponding to the travel distance of those empty slots. In this paper, a waste-free fairness control method based on a two-layer window composed of the cycle and packet windows is developed. Using the proposed method, packets allocated to multiple fairness cycles are simultaneously transferred and, in consequence, the otherwise wasted bandwidth can be reused to carry, in advance, packets allocated to future fairness cycles. This method is applied to two typical ring protocols with only the packet window, ATMR and MetaRing, and their performances are investigated. The simulation results show that the cycle window is very effective to improve the performance of the ATMR and MetaRing protocols.

A loop architecture of DQDB with slot reuse (LDQDB-SR) segmented by erasure nodes was studied to overcome the performance limitation due to the nature of the unidirectional bus architecture of DQDB with slot reuse. The LDQDB-SR adopts the destination slot release and an inter-segment bandwidth regulation based on the distributed queuing system of DQDB. This network suffers not only from severe throughput deterioration due to a high regulation cost and an excessive transit delay but also from unfairness in bandwidth sharing, especially under an overload condition. In this paper, we introduce an enhanced loop architecture of DQDB with slot reuse (ELDQDB-SR) to improve the performance of LDQDB-SR. The ELDQDB-SR uses a quota-based inter-segment bandwidth regulation mechanism to effectively control the bandwidth use of each segment. Each station selects the bus that minimizes the number of erasure nodes on the path to destination stations. Fairness control methods of DQDB are reviewed and the alpha-tuning mechanism is modified to achieve a fair bandwidth distribution among stations within each segment. Simulation results show that the ELDQDB-SR gives an enhanced throughput level and also maintains good fairness under overload conditions.