The characteristics of the Si resonant tunneling metal-oxide-semiconductor transistor (SRTMOST), which has double-barriers at the both edges of the channel, is examined from viewpoints of the substitution for conventional metal-oxide-semiconductor field-effect transistor (MOSFET) in the sub-0.1 µm era. The influence of the double-barriers on the suppression of the drain currents at the gate-off condition is discussed, and the feasibility of the three-valued logic circuit which is composed of the p-MOSFET and the n-SRTMOST is also shown theoretically.