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May SUZUKI Manabu KAWABE Takashi YANO Junko KIYOTA Hirotake ISHII Tsuyoshi TAMAKI Nobukazu DOI
In this paper, a new multi-engine architecture for the baseband modem LSI of W-CDMA systems is proposed. The developed test chip with this architecture is also presented. In the multi-engine architecture, processors and wired logic are combined to obtain both flexibility and low power dissipation. Multiple processors are used in the LSI to lower its operating frequency by distributed processing. A customized processor is used to lower the overhead of multiple processors in terms of LSI scale. The test chip was fabricated with a 0.25-µm process. Its measured power dissipation for simultaneous 384 kbit/s downlink reception and 64 kbit/s uplink transmission was 160 mW.