Asynchronous Transfer Mode (ATM) is a promised bearer transmission service for high speed multimedia LAN. Recently, high speed multimedia ATM LAN products have been available. Therefore, in order to interconnect them, the multimedia backbone LAN, which has the expandable high throughput over 10Gbps, supporting multicast, multi-QoS, and many interfaces including 622 Mbps, will be widely required. In this paper, the VLSI oriented input and output buffered switch architecture is proposed as the hardware architecture for multimedia backbone switch node. This paper describes that the chip set consisting of four VLSIs, that is, the switch element, the switch access, the distributor/arbiter, and the multiplexer/demultiplexer, can realize the backbone switch core, and the main specifications required to each VLSI are derived.

Ethernet is a scheme of local computer networking, which has been widely utilized. Acknowledging Ethernet insures immediate acknowledgement by providing an acknowledgement mechanism in the MAC (Media Access Control) layer protocol. Although Acknowledging Ethernet gives both higher reliability and higher performance, this scheme is not compatible with DIX or IEEE 802 Ethernet. In this paper, a modified scheme which is compatible with the original Ethernet, called the Compatible Acknowledging Ethernet (CAE), is proposed. The CAE scheme allows sharing of the same cable with Ethernet. CAE can be implemented by adding a small amount of logic to the Network Interface Unit of the original Ethernet.