We fabricated a new lateral Power MOS FET with an SOI structure formed by a solid phase epitaxy method which has a buried gate under the channel layer and a trench gate/drain. We studied the temperature dependence of the Vg-Id characteristic and Vd-Id characteristic in the temperature range of from 27 to 150. In the Vd-Id characteristic, the drain current decreases as the temperature increases in the saturation region, but the drain current increases as the temperature increases in the linear region. Zero-temperature-coefficient bias point of Vg-Id characteristic was 0. 3 V. And, the threshold voltage variation was -2. 8 mV/. In the Vd-Id characteristic, the drain current decreases as the temperature increases. The specific on-resistance was obtained in the linear region of the Vd-Id characteristic. The specific on-resistance variation was 0. 3 mWmm2/. The temperature characteristics of this device are as good as those of the conventional MOS FET.