A novel design method for wideband low-noise multi-stage amplifiers is presented. It utilizes a RL-SFC (esistive oaded eries eedback ircuit) comprised of a series feedback circuit with additional lossy match stubs to achieve low noise figure, low VSWRs, flat gain, and high stability simultaneously. In addition, each stage amplifier employs a different approach for designing the RL-SFC to achieve the best compromise between noise figure, VSWR, gain, and stability as a multi-stage amplifier. With the use of this novel design method, the 3-stage amplifier has demonstrated the state-of-the-art wideband low-noise performance of 2.3 dB over 6 to 18 GHz.

An L-band 4-bit RL/RC-switched active phase shifter using differential switches is developed. It employs RL/RC circuits in the design of series feedback loops of the quadrature differential amplifier and achieves 90, 45, and 22.5of phase shift by switching on and off the RL/RC circuits alternatively. On the other hand, a 180phase shift is achieved with the use of a phase difference between the differential outputs. By cascading all four bits, an insertion gain of 16 to 23 dB, a phase error of less than 8.5, and an RMS phase error of 4.6have been achieved at 1 GHz.

This paper describes the design, fabrication, and performance of a C- to Ku-band 2 W balanced amplifier multi-chip module employing an MMIC/Super-MIC/MIC configuration. In this module, single-ended amplifiers, quadrature couplers, and pulsed-drive circuits are fabricated on MMICs, Super-MICs, and MICs, respectively, which show different features in fabrication, performance, size, and cost. With the use of the distinguished features of MMICs, Super-MICs, and MICs, the multi-chip module with high performance, small size, and low cost has been achieved. The MMIC/Super-MIC/MIC-combined module would be a candidate for a variety of multi-chip modules with stringent requirements for performance, size, and cost.

This paper describes the design, fabrication, and performance of a GaAs FET linearizer with a large source inductance, focusing mainly on (a) a mechanism of positive gain and negative phase deviations for input power, (b) stability considerations, and (c) a dependence on load impedance. In addition, in an application to the linearized amplifier, it is shown that an improvement can be achieved for adjacent channel leakage power (ACP) and third order intermodulation distortion (IM3) with the use of the linearizer.