The search functionality is under construction.

Author Search Result

[Author] Yoshiaki KOGA(6hit)

1-6hit
  • FOREWORD

    Yoshiaki KOGA  

     
    FOREWORD

      Vol:
    E75-D No:6
      Page(s):
    761-762
  • Realization of Multi-Terminal Universal Interconnection Networks Using Contact Switches

    Tsutomu SASAO  Takashi MATSUBARA  Katsufumi TSUJI  Yoshiaki KOGA  

     
    PAPER-Logic Design

      Pubricized:
    2021/04/01
      Vol:
    E104-D No:8
      Page(s):
    1068-1075

    A universal interconnection network implements arbitrary interconnections among n terminals. This paper considers a problem to realize such a network using contact switches. When n=2, it can be implemented with a single switch. The number of different connections among n terminals is given by the Bell number B(n). The Bell number shows the total number of methods to partition n distinct elements. For n=2, 3, 4, 5 and 6, the corresponding Bell numbers are 2, 5, 15, 52, and 203, respectively. This paper shows a method to realize an n terminal universal interconnection network with $ rac {3}{8}(n^2-1)$ contact switches when n=2m+1≥5, and $ rac {n}{8}(3n+2)$ contact switches, when n=2m≥6. Also, it shows that a lower bound on the number of contact switches to realize an n-terminal universal interconnection network is ⌈log 2B(n)⌉, where B(n) is the Bell number.

  • Studies on Highly Reliable Clock Generators

    Hiroki SAWADA  Takakazu KUROKAWA  Yoshiaki KOGA  

     
    PAPER

      Vol:
    E73-E No:8
      Page(s):
    1287-1293

    There have been many studies on fault-tolerance for making highly reliable systems. As the demand for high-speed computers grows, the design of their clock systems becomes a major research subject not only in achieving high performance, but also in reducing assembly and maintenance costs. In this paper, two different kinds of highly reliable clock generators are proposed. Their hardware construction is very simple, because they have only several clock oscillators synchronized with each other using a coupling device. On the other hand, their usages are different. One is used as a crystal coupled clock generator to have a fault-tolerancy, and the other is used as a quick start clock generator for those systems which requires a rapid start necessarily. At first, clock synchronization of the multiple oscillators synchronized with each other using a coupling device, is discussed. This clock synchronization becomes the basic technique for the two clock generators which will be proposed in this paper. By connecting each oscillators using a coupling device, those oscillators easily synchronize with each other. Furthermore, by choosing coupling devices adequately, the proposed clock generator can have a fault tolerant property. Second, the crystal coupled fault-tolerant clock generator suitable for non stop operation even if one of the generators halts by some faults is proposed. To satisfy a fault tolerant property, the crystal resonator was found to have a good characteristic as a coupling device. This is because crystal shows a rapid transformation in the reactance value according to the small deviation of the oscillator's frequency. Finally, another clock generator with a quick start is also described. This quick start clock generator also consists of the coupled oscillator and it uses the same technique of the fault-tolerant clock generator. An oscillator having high Q ordinarily needs a longer set up time compared with those oscillators having a low Q. An oscillator coupled with a vibrating oscillator can start its oscillation quickly with a start of power supply.

  • A Fault Tolerant Intercommunication Scheme Using Bank Memory Switching

    Norihiko TANAKA  Takakazu KUROKAWA  Takashi MATSUBARA  Yoshiaki KOGA  

     
    PAPER

      Vol:
    E75-D No:6
      Page(s):
    804-809

    This paper proposes a new fault tolerant intercommunication scheme for real-time operations and three new interconnection networks to construct a fault tolerant multi-processor system for pipeline processings. The proposed intercommunication scheme using bank memory switching technique has an advantage to make a fault tolerant pipeline system so that it can detect any failure caused in a processing element of the system. In addition, it can overcome conventional problems caused in interconnection circuits to flow data with one way direction such as a pipeline processing.

  • Dependable Bus Arbitraion by Alternating Competition with Checkers

    Kazuo TOKITO  Takashi MATSUBARA  Yoshiaki KOGA  

     
    PAPER-Testing/Checking

      Vol:
    E80-D No:1
      Page(s):
    44-50

    A fault in multi-processing system arbitration circuits result in incorrect arbitration or abnormal operation of the system. A highly reliable system requires dependable arbitration in order to operate properly. Previously, we proposed alternate competing arbitration suitable for highly reliable systems. In this paper, we propose a method for improvement of fault detection and location using additional checkers. This method is effective to maintain reliability of the system.

  • Fault Tolerant Properties and a Fault-Checking Method of Fuzzy Control

    Hiroshi ITO  Takashi MATSUBARA  Takakazu KUROKAWA  Yoshiaki KOGA  

     
    PAPER-Fail-Safe/Fault Tolerant

      Vol:
    E76-D No:5
      Page(s):
    586-593

    Generally it is said that a fuzzy control system has fault tolerant properties, but it is not clearly studied. In this paper, first, the influence of faults in fuzzy control systems is examined. Errors given by fault simulation are not negligible. However, no fault detecting method is applied in the realized fuzzy control systems. Then a fault-checking method to detect faults is proposed in this paper.