Design approach to improving fmax of InP-based HBTs by combining lateral scaling (lithographic scaling) and vertical scaling (improving fT) is discussed. An HBT scaling model is formulated to provide means of analyzing the essential impact of scaling on fmax. The model was compared with measurements of single and double heterojunction bipolar transistors with different fT and various emitter sizes. While a high fmax of 313 GHz was achieved using submicron HBT with high fT, it was found that further improvement could have been obtained by reducing the emitter resistance, which has imposed considerable limit on lateral scaling.