The metal/ferroelectric material/metal/oxide insulating material/Si substrates (MFMIS) structure was realized by using Pb(Zr0. 4Ti0. 6)O3 (PZT) thin film. PZT(330 nm thick) thin film was sandwiched between the upper electrode of Ti/Pt-Rh (about 380 nm thick and 123 microns in diameter) and the lower electrode of Pt-Rh/Ti (about 380 nm thick and 378 microns in diameter). The MFM structures mentioned above were prepared on metal oxide semiconductor (MOS structures). Pt-Rh and Ti lower electrodes were directly deposited on a poly-Si MOS electrode with sputtering, and PZT layer was prepared using the sol-gel method. In order to maximize induced charge density in the MOS gate, diameters of the upper and the lower electrodes were adjusted, and the MFM area-to-MOS area ratio was optimized. By using the area ratio of 0. 11 a memory window of 2. 4 V was obtained.