MFMIS Structure for Nonvolatile Ferroelectric Memory Using PZT Thin Film

Toshiyuki KAWASAKI; Yoshikazu AKIYAMA; Shunsuke FUJITA; Shiro SATOH

MFMIS Structure for Nonvolatile Ferroelectric Memory Using PZT Thin Film

Toshiyuki KAWASAKI, Yoshikazu AKIYAMA, Shunsuke FUJITA, Shiro SATOH

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The metal/ferroelectric material/metal/oxide insulating material/Si substrates (MFMIS) structure was realized by using Pb(Zr_{0. 4}Ti_{0. 6})O₃ (PZT) thin film. PZT(330 nm thick) thin film was sandwiched between the upper electrode of Ti/Pt-Rh (about 380 nm thick and 123 microns in diameter) and the lower electrode of Pt-Rh/Ti (about 380 nm thick and 378 microns in diameter). The MFM structures mentioned above were prepared on metal oxide semiconductor (MOS structures). Pt-Rh and Ti lower electrodes were directly deposited on a poly-Si MOS electrode with sputtering, and PZT layer was prepared using the sol-gel method. In order to maximize induced charge density in the MOS gate, diameters of the upper and the lower electrodes were adjusted, and the MFM area-to-MOS area ratio was optimized. By using the area ratio of 0. 11 a memory window of 2. 4 V was obtained.

Publication: IEICE TRANSACTIONS on Electronics Vol.E81-C No.4 pp.584-589

Publication Date: 1998/04/25

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Type of Manuscript: Special Section PAPER (Special Issue on Advanced Memory Devices Using High-Dielectric-Constant and Ferroelectric Thin Films)

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Toshiyuki KAWASAKI, Yoshikazu AKIYAMA, Shunsuke FUJITA, Shiro SATOH, "MFMIS Structure for Nonvolatile Ferroelectric Memory Using PZT Thin Film" in IEICE TRANSACTIONS on Electronics, vol. E81-C, no. 4, pp. 584-589, April 1998, doi: .
Abstract: The metal/ferroelectric material/metal/oxide insulating material/Si substrates (MFMIS) structure was realized by using Pb(Zr_{0. 4}Ti_{0. 6})O₃ (PZT) thin film. PZT(330 nm thick) thin film was sandwiched between the upper electrode of Ti/Pt-Rh (about 380 nm thick and 123 microns in diameter) and the lower electrode of Pt-Rh/Ti (about 380 nm thick and 378 microns in diameter). The MFM structures mentioned above were prepared on metal oxide semiconductor (MOS structures). Pt-Rh and Ti lower electrodes were directly deposited on a poly-Si MOS electrode with sputtering, and PZT layer was prepared using the sol-gel method. In order to maximize induced charge density in the MOS gate, diameters of the upper and the lower electrodes were adjusted, and the MFM area-to-MOS area ratio was optimized. By using the area ratio of 0. 11 a memory window of 2. 4 V was obtained.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e81-c_4_584/_p

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@ARTICLE{e81-c_4_584,
author={Toshiyuki KAWASAKI, Yoshikazu AKIYAMA, Shunsuke FUJITA, Shiro SATOH, },
journal={IEICE TRANSACTIONS on Electronics},
title={MFMIS Structure for Nonvolatile Ferroelectric Memory Using PZT Thin Film},
year={1998},
volume={E81-C},
number={4},
pages={584-589},
abstract={The metal/ferroelectric material/metal/oxide insulating material/Si substrates (MFMIS) structure was realized by using Pb(Zr_{0. 4}Ti_{0. 6})O₃ (PZT) thin film. PZT(330 nm thick) thin film was sandwiched between the upper electrode of Ti/Pt-Rh (about 380 nm thick and 123 microns in diameter) and the lower electrode of Pt-Rh/Ti (about 380 nm thick and 378 microns in diameter). The MFM structures mentioned above were prepared on metal oxide semiconductor (MOS structures). Pt-Rh and Ti lower electrodes were directly deposited on a poly-Si MOS electrode with sputtering, and PZT layer was prepared using the sol-gel method. In order to maximize induced charge density in the MOS gate, diameters of the upper and the lower electrodes were adjusted, and the MFM area-to-MOS area ratio was optimized. By using the area ratio of 0. 11 a memory window of 2. 4 V was obtained.},
keywords={},
doi={},
ISSN={},
month={April},}

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TY - JOUR
TI - MFMIS Structure for Nonvolatile Ferroelectric Memory Using PZT Thin Film
T2 - IEICE TRANSACTIONS on Electronics
SP - 584
EP - 589
AU - Toshiyuki KAWASAKI
AU - Yoshikazu AKIYAMA
AU - Shunsuke FUJITA
AU - Shiro SATOH
PY - 1998
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E81-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 1998
AB - The metal/ferroelectric material/metal/oxide insulating material/Si substrates (MFMIS) structure was realized by using Pb(Zr_{0. 4}Ti_{0. 6})O₃ (PZT) thin film. PZT(330 nm thick) thin film was sandwiched between the upper electrode of Ti/Pt-Rh (about 380 nm thick and 123 microns in diameter) and the lower electrode of Pt-Rh/Ti (about 380 nm thick and 378 microns in diameter). The MFM structures mentioned above were prepared on metal oxide semiconductor (MOS structures). Pt-Rh and Ti lower electrodes were directly deposited on a poly-Si MOS electrode with sputtering, and PZT layer was prepared using the sol-gel method. In order to maximize induced charge density in the MOS gate, diameters of the upper and the lower electrodes were adjusted, and the MFM area-to-MOS area ratio was optimized. By using the area ratio of 0. 11 a memory window of 2. 4 V was obtained.
ER -