This paper describes a unified process and device simulation system named P &D Workbench (Process and Device Workbench). The P &D Workbench is an EWS (Engineering Work Station) based system which is connected with MFCs (Main Frame Computers) via networks and can easily execute 2-dimensional process, device, topography and capacitance simulations. Since the P &D Workbench has a supervisor, data-base and excellent user interface using Japanese menu functions and mouse operations, a handling time can be dramatically reduced. The supervisor controls the simulation sequence and file transfer, and manages jobs and files both on EWSs and MFCs, so that plural simulations of splitting conditions can be automatically executed. Short TAT (Turn Around Time) is achieved by selecting an appropriate platform depended on a problem size and MFCs' CPU loads. The effects of the P &D Workbench are shown in examples applied to the development of a 4M-DRAM.

A new threshold voltage formula is derived for a U-shaped gate MOSFET where the gate oxide becomes thicker at both channel ends. It is found that when charge-sharing effect due to source/drain-junctions is not accounted for, threshold voltage increases with decreasing channel length, exhibiting an inverse short-channel effect (ISCE). When charge-sharing effect is taken into account, the ISCE reduces remarkably, resulting in a flat threshold voltage characteristic over a wide range of channel lengths. Computer simulations using a two-dimensional device simulator show a good agreement with these analytical findings.